SN10KHT5573 Datasheet, PDF (1/7 Pages) Texas Instruments – OCTAL ECL-TO-TTL TRANSLATOR WITH D-TYPE TRANSPARENT LATCHES AND 3-STATE OUTPUTS

SN10KHT5573
OCTAL ECLĆTOĆTTL TRANSLATOR WITH DĆTYPE
TRANSPARENT LATCHES AND 3ĆSTATE OUTPUTS
SDZS015 − MAY 1990 − REVISED OCTOBER 1990
• 10KH Compatible
• ECL and TTL Control Inputs
• Noninverting Outputs
• Flow-Through Architecture Optimizes PCB
Layout
• Center Pin V_CC, V_EE, and GND
Configurations Minimize High-Speed
Switching Noise
• Package Options Include “Small Outline”
Packages and Standard Plastic 300-mil
DIPs
description
DW OR NT PACKAGE
(T0P VIEW)
1Q ₁
2Q ₂
3Q ₃
4Q ₄
V_{CC 5}
GND ₆
GND 7
GND 8
5Q 9
6Q 10
7Q 11
8Q 12
24 ^1D
23 ^2D
22 ^3D
21 ^4D
20 ^{OE (TTL)}
19 ^V_EE
18 GND
17 LE (ECL)
16 5D
15 6D
14 7D
13 8D
This octal ECL-to-TTL translator is designed to provide efficient translation between a 10KH ECL signal
environment and a TTL signal environment. This device is designed specifically to improve the performance
and density of ECL-to-TTL CPU/bus-oriented functions such as memory address drivers, clock drivers, and
bus-oriented receivers and transmitters.
The eight latches of the SN10KHT5573 are transparent D-type latches. While latch enable (LE) is low, the Q
outputs follow the data (D) inputs. When LE is high, the Q outputs are latched at the levels that were set up at
the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance third state and increased drive provide the capability to drive bus
lines without need for interface or pullup components. Output-enable OE does not affect the internal operations
of the latches. Old data can be retained or new data can be entered while the outputs are off.
The SN10KHT5573 is characterized for operation from 0° to 75°C.
FUNCTION TABLE
OUTPUT
CONTROL
OE LE
L
L
L
L
LH
HX
DATA
INPUT
D
L
H
X
X
OUTPUT
(TTL)
Q
L
H
Q0
Z
logic symbol^†
17
LE
20
OE
24
1D
2D ²³
22
3D
21
4D
5D ¹⁶
6D ¹⁵
14
7D
8D ¹³
ECL/TTL C1
EN
1D ECL/TTL
1 _1Q
2 _2Q
3 _3Q
4
4Q
9
5Q
10
6Q
11
7Q
12 _8Q
† _{This symbol is in accordance with ANSI/IEEE Std 91-1984 and}
IEC Publication 617-12.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  1990, Texas Instruments Incorporated
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