SM320LC31-EP Datasheet, PDF (1/39 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSOR

SM320LC31ĆEP
DIGITAL SIGNAL PROCESSOR
SGUS039 − AUGUST 2002
D Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product Change Notification
D Qualification Pedigree^†
D Operating Temperature Ranges:
− Military (M) −55°C to 125°C
D High-Performance Floating-Point Digital
Signal Processor (DSP):
− SM320LC31-40EP (3.3 V)
50-ns Instruction Cycle Time
220 MOPS, 40 MFLOPS, 20 MIPS
D 32-Bit High-Performance CPU
D 16- / 32-Bit Integer and 32- / 40-Bit
Floating-Point Operations
D 32-Bit Instruction and Data Words, 24-Bit
Addresses
D Two 1K Word × 32-Bit Single-Cycle
Dual-Access On-Chip RAM Blocks
D Boot-Program Loader
D 64-Word × 32-Bit Instruction Cache
D Eight Extended-Precision Registers
D Two Address Generators With Eight
Auxiliary Registers and Two Auxiliary
Register Arithmetic Units (ARAUs)
D Two Low-Power Modes
description
D On-Chip Memory-Mapped Peripherals:
− One Serial Port Supporting
8- / 16- / 24- / 32-Bit Transfers
− Two 32-Bit Timers
− One-Channel Direct Memory Access
(DMA) Coprocessor for Concurrent I/O
and CPU Operation
D Fabricated Using Enhanced Performance
Implanted CMOS (EPIC) Technology by
Texas Instruments (TI )
D Two- and Three-Operand Instructions
D 40 / 32-Bit Floating-Point / Integer Multiplier
and Arithmetic Logic Unit (ALU)
D Parallel ALU and Multiplier Execution in a
Single Cycle
D Block-Repeat Capability
D Zero-Overhead Loops With Single-Cycle
Branches
D Conditional Calls and Returns
D Interlocked Instructions for
Multiprocessing Support
D Bus-Control Registers Configure
Strobe-Control Wait-State Generation
D Validated Ada Compiler
D Integer, Floating-Point, and Logical
Operations
D 32-Bit Barrel Shifter
D One 32-Bit Data Bus (24-Bit Address)
D Packaging
− 132-Lead Plastic Quad Flatpack
(PQ Suffix)
The SM320LC31-EP digital signal processor (DSP) is a 32-bit, floating-point processor manufactured in 0.6-µm
triple-level-metal CMOS technology. The device is part of the SMJ320C3x generation of DSPs from Texas
Instruments.
The SM320LC31-EP internal busing and special digital-signal-processing instruction set have the speed and
flexibility to execute up to 60 MFLOPS. The SM320LC31-EP optimizes speed by implementing functions in
hardware that other processors implement through software or microcode. This hardware-intensive approach
provides performance previously unavailable on a single chip.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
† _{Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range.}
This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this
component beyond specified performance and environmental limits.
EPIC is a trademark of Texas Instruments Incorporated.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2002, Texas Instruments Incorporated
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
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