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SCANSTA476 Datasheet, PDF (1/12 Pages) National Semiconductor (TI) – Eight Input IEEE 1149.1 Analog Voltage Monitor
SCANSTA476
www.ti.com
SNLS171G – JANUARY 2005 – REVISED APRIL 2013
SCANSTA476 Eight Input IEEE 1149.1 Analog Voltage Monitor
Check for Samples: SCANSTA476
FEATURES
1
•2 Eight Selectable Analog Input Channels
• Analog Full-Scale Input Range 0V to VDD
• Typical Accuracy of 2 mV at Maximum VDD
• Very Low Power Operation
• Small Package Footprint in 16-Lead, 5 x 5 x 0.8
mm WSON
• Single +2.7V to +5.5V Supply Operation
• IEEE 1149.1 (JTAG) Compliant Interface
APPLICATIONS
• Measurement of Point Voltages
• Real-time Signal Monitoring
• System Health Monitoring and Prognostics
• Debug, Environmental Test, Production Test,
Field Service
• Supplement In-Circuit Tester (ICT) Access
• Vital in Servers, Computing,
Telecommunication and Industrial Equipment
• Essential in Medical, Data Storage, and
Networking Equipment
DESCRIPTION
The SCANSTA476 is a low power, Analog Voltage
Monitor used for sampling or monitoring up to 8
analog/mixed-signal input channels. Analog Voltage
Monitors are valuable during product development,
environmental test, production, and field service for
verifying and monitoring power supply and reference
voltages. In a supervisory role, the 'STA476 is useful
for card or system-level health monitoring and
prognostics applications.
Instead of requiring an external microcontroller with a
GPIO interface, the 'STA476 features a common
IEEE 1149.1 (JTAG) interface to select the analog
input, initiate a measurement, and access the results
- further extending the capabilities of an existing
JTAG infrastructure.
The SCANSTA476 uses the VREF input as a
reference. This enables the SCANSTA476 to operate
with a full-scale input range of 0 to VDD, which can
range from +2.7V to +5.5V.
The SCANSTA476 is packaged in a 16-lead non-
pullback WSON package that provides an extremely
small footprint for applications where space is a
critical consideration. This product operates over the
industrial temperature range of −40°C to +85°C.
Block Diagram
VREF
A0
A1
A2
Successive
A3
Approximation
A4
ADC
A5
A6
A7
Control
Logic
IEEE 1149.1
TAP (JTAG)
TDI TDO TCK TMS TRST
1
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2013, Texas Instruments Incorporated