PLL1707-Q1 Datasheet, PDF (1/18 Pages) Texas Instruments – 3.3-V DUAL-PLL MULTICLOCK GENERATOR

PLL1707-Q1
www.ti.com
SLES259A – JUNE 2010 – REVISED MARCH 2011
3.3-V DUAL-PLL MULTICLOCK GENERATOR
Check for Samples: PLL1707-Q1
FEATURES
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• Qualified for Automotive Applications
• 27-MHz Master Clock Input
• Generated Audio System Clock
– SCKO0: 768 f_S (f_S = 44.1 kHz)
– SCKO1: 768 f_S, 512 f_S (f_S = 48 kHz)
– SCKO2: 256 f_S (f_S = 32, 44.1, 48, 64, 88.2, 96
kHz)
– SCKO3: 384 f_S (f_S = 32, 44.1, 48, 64, 88.2, 96
kHz)
• Zero PPM Error Output Clocks
• Low Clock Jitter: 50 ps (Typical)
• Multiple Sampling Frequencies:
f_S = 32, 44.1, 48, 64, 88.2, 96 kHz
• 3.3-V Single Power Supply
• Parallel Control
• Package: 20-Pin SSOP (150 mil), Lead-Free
Product
APPLICATIONS
• HDD + DVD Recorders
• DVD Recorders
• HDD Recorders
• DVD Players
• DVD Add-On Cards for Multimedia PCs
• Digital HDTV Systems
• Set-Top Boxes
DESCRIPTION
The PLL1707 is a low-cost phase-locked loop (PLL) multiclock generator. The PLL1707 can generate four
system clocks from a 27-MHz reference input frequency. The clock outputs of the PLL1707 can be controlled by
sampling frequency-control pins. The device gives customers both cost and space savings by eliminating
external components and enables customers to achieve the very low-jitter performance needed for high
performance audio DACs and/or ADCs. The PLL1707 is ideal for MPEG-2 applications that use a 27-MHz
master clock such as DVD recorders, HDD recorders, DVD add-on cards for multimedia PCs, digital HDTV
systems, and set-top boxes.
FUNCTIONAL BLOCK DIAGRAM
SR FS2 FS1
CSEL
VCC AGND VDD1–3 DGND1–3
Reset
XT1
OSC
XT2
Mode Control Interface
Power Supply
PLL2
PLL1
Divider
Divider
Divider
MCKO1 MCKO2
SCKO0 SCKO1
SCKO2
SCKO3
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Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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