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MSP430F5259_15 Datasheet, PDF (1/112 Pages) Texas Instruments – Mixed-Signal Microcontrollers | |||
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MSP430F5259, MSP430F5258, MSP430F5257, MSP430F5256
MSP430F5255, MSP430F5254, MSP430F5253, MSP430F5252
SLAS903B â MAY 2013 â REVISED NOVEMBER 2015
MSP430F525x Mixed-Signal Microcontrollers
1 Device Overview
1.1 Features
1
⢠Dual-Supply Voltage Device
â Primary Supply (AVCC, DVCC)
⢠Powered From External Supply:
3.6 V Down to 1.8 V
⢠Up to 18 General-Purpose I/Os With up to 8
External Interrupts
â Low-Voltage Interface Supply (DVIO)
⢠Powered From Separate External Supply:
1.62 V to 1.98 V
⢠Up to 35 General-Purpose I/Os With up to
16 External Interrupts
⢠Serial Communications
⢠Ultra-Low Power Consumption
â Active Mode (AM):
All System Clocks Active
290 µA/MHz at 8 MHz, 3.0 V, Flash Program
Execution (Typical)
150 µA/MHz at 8 MHz, 3.0 V, RAM Program
Execution (Typical)
â Standby Mode (LPM3):
Real-Time Clock (RTC) With Crystal, Watchdog,
and Supply Supervisor Operational, Full RAM
Retention, Fast Wakeup:
2.1 µA at 2.2 V, 2.3 µA at 3.0 V (Typical)
Low-Power Oscillator (VLO), General-Purpose
Counter, Watchdog, and Supply Supervisor
Operational, Full RAM Retention, Fast Wakeup:
1.6 µA at 3.0 V (Typical)
â Off Mode (LPM4):
Full RAM Retention, Supply Supervisor
Operational, Fast Wakeup:
1.3 µA at 3.0 V (Typical)
â Shutdown Mode (LPM4.5):
0.18 µA at 3.0 V (Typical)
⢠Wakeup From Standby Mode in 3.5 µs (Typical)
⢠16-Bit RISC Architecture, Extended Memory, up to
25-MHz System Clock
⢠Flexible Power-Management System
â Fully Integrated LDO With Programmable
Regulated Core Supply Voltage
â Supply Voltage Supervision, Monitoring, and
Brownout
⢠Unified Clock System
â FLL Control Loop for Frequency Stabilization
â Low-Power Low-Frequency Internal Clock
Source (VLO)
â Low-Frequency Trimmed Internal Reference
Source (REFO)
â 32-kHz Watch Crystals (XT1)
â HF Crystals up to 32 MHz (XT2)
⢠16-Bit Timer TA0, Timer_A With Five
Capture/Compare Registers
⢠16-Bit Timer TA1, Timer_A With Three
Capture/Compare Registers
⢠16-Bit Timer TA2, Timer_A With Three
Capture/Compare Registers
⢠16-Bit Timer TB0, Timer_B With Seven
Capture/Compare Shadow Registers
⢠Four Universal Serial Communication Interfaces
â USCI_A0, A1, A2, A3 Each Support:
⢠Enhanced UART With Automatic Baud-Rate
Detection
⢠IrDA Encoder and Decoder
⢠Synchronous SPI
â USCI_B0, B1, B2, B3 Each Support:
⢠I2C
⢠Synchronous SPI
⢠10-Bit Analog-to-Digital Converter (ADC) With
Internal Reference, Sample-and-Hold
⢠Comparator
⢠Hardware Multiplier Supports 32-Bit Operations
⢠Serial Onboard Programming, No External
Programming Voltage Needed
⢠Three-Channel Internal DMA
⢠Basic Timer With RTC Feature
⢠Table 3-1 Summarizes the Available Family
Members and Packages
⢠For Complete Module Descriptions, See the
MSP430x5xx and MSP430x6xx Family User's
Guide (SLAU208)
⢠For Design Guidelines, See Designing With
MSP430F522x and MSP430F521x Devices
(SLAA558)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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