MSP430F5229_15 Datasheet, PDF (1/122 Pages) Texas Instruments – Mixed-Signal Microcontrollers

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MSP430F5229, MSP430F5227, MSP430F5224, MSP430F5222
MSP430F5219, MSP430F5217, MSP430F5214, MSP430F5212
SLAS718F – NOVEMBER 2012 – REVISED NOVEMBER 2015
MSP430F522x, MSP430F521x Mixed-Signal Microcontrollers
1 Device Overview
1.1 Features
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• Dual-Supply Voltage Device
– Primary Supply (AVCC, DVCC):
• Powered From External Supply:
3.6 V Down to 1.8 V
• Up to 22 General-Purpose I/Os With up to
Four External Interrupts
– Low-Voltage Interface Supply (DVIO):
• Powered From Separate External Supply:
1.62 V to 1.98 V
• Up to 31 General-Purpose I/Os With up to
12 External Interrupts
• Serial Communications
• Ultra-Low Power Consumption
– Active Mode (AM):
All System Clocks Active
290 µA/MHz at 8 MHz, 3.0 V, Flash Program
Execution (Typical)
150 µA/MHz at 8 MHz, 3.0 V, RAM Program
Execution (Typical)
– Standby Mode (LPM3):
Real-Time Clock (RTC) With Crystal, Watchdog,
and Supply Supervisor Operational, Full RAM
Retention, Fast Wakeup:
1.9 µA at 2.2 V, 2.1 µA at 3.0 V (Typical)
Low-Power Oscillator (VLO), General-Purpose
Counter, Watchdog, and Supply Supervisor
Operational, Full RAM Retention, Fast Wakeup:
1.4 µA at 3.0 V (Typical)
– Off Mode (LPM4):
Full RAM Retention, Supply Supervisor
Operational, Fast Wakeup:
1.1 µA at 3.0 V (Typical)
– Shutdown Mode (LPM4.5):
0.18 µA at 3.0 V (Typical)
• Wake up From Standby Mode in 3.5 µs (Typical)
• 16-Bit RISC Architecture, Extended Memory, up to
25-MHz System Clock
• Flexible Power-Management System
– Fully Integrated LDO With Programmable
Regulated Core Supply Voltage
– Supply Voltage Supervision, Monitoring, and
Brownout
• Unified Clock System
– FLL Control Loop for Frequency Stabilization
– Low-Power Low-Frequency Internal Clock
Source (VLO)
– Low-Frequency Trimmed Internal Reference
Source (REFO)
– 32-kHz Watch Crystals (XT1)
– High-Frequency Crystals up to 32 MHz (XT2)
• 16-Bit Timer TA0, Timer_A With Five
Capture/Compare Registers
• 16-Bit Timer TA1, Timer_A With Three
Capture/Compare Registers
• 16-Bit Timer TA2, Timer_A With Three
Capture/Compare Registers
• 16-Bit Timer TB0, Timer_B With Seven
Capture/Compare Shadow Registers
• Two Universal Serial Communication Interfaces
– USCI_A0 and USCI_A1 Each Support:
• Enhanced UART With Automatic Baud Rate
Detection
• IrDA Encoder and Decoder
• Synchronous SPI
– USCI_B0 and USCI_B1 Each Support:
• I²C
• Synchronous SPI
• 10-Bit Analog-to-Digital Converter (ADC) With
Internal Reference, Sample-and-Hold
• Comparator
• Hardware Multiplier Supports 32-Bit Operations
• Serial Onboard Programming, No External
Programming Voltage Needed
• Three-Channel Internal DMA
• Basic Timer With RTC Feature
• Section 3 Summarizes Available Family Members
• For Complete Module Descriptions, See the
MSP430x5xx and MSP430x6xx Family User's
Guide (SLAU208)
• For Design Guidelines, See Designing With
MSP430F522x and MSP430F521x Devices
(SLAA558)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.