LMP2012QML Datasheet, PDF (1/13 Pages) National Semiconductor (TI) – Dual High Precision, Rail-to-Rail Output Operational Amplifier

LMP2012QML
www.ti.com
SNOSAU5H – MARCH 2007 – REVISED APRIL 2013
LMP2012QML Dual High Precision, Rail-to-Rail Output Operational Amplifier
FEATURES
1
•2 Total Ionizing Dose 50 krad(Si)
• ELDRS Free 50 krad(Si)
• TCV_IO Temperature Sensitivity (Typical) 0.015
µV/°C
(For V_S = 5V, Typical Unless Otherwise Noted)
• Low Ensured V_IO over Temperature 60 µV
• Low Noise with no 1/f 35nV/√Hz
• High CMRR 90 dB
• High PSRR 90 dB
• High A_VOL 85 dB
• Wide Gain-Bandwidth Product 3MHz
• High Slew Rate 4V/µs
• Rail-to-Rail Output 30mV
• No External Capacitors Required
APPLICATIONS
• Attitude and Orbital Controls
• Static Earth Sensing
• Sun Sensors
• Inertial Sensors
• Pressure Sensors
• Gyroscopes
• Earth Observation Systems
DESCRIPTION
The LMP2012 offers unprecedented accuracy and
stability. This device utilizes patented techniques to
measure and continually correct the input offset error
voltage. The result is an amplifier which is ultra stable
over time and temperature. It has excellent CMRR
and PSRR ratings, and does not exhibit the familiar
1/f voltage and current noise increase that plagues
traditional amplifiers. The combination of the
LMP2012 characteristics makes it a good choice for
transducer amplifiers, high gain configurations, ADC
buffer amplifiers, DAC I-V conversion, and any other
2.7V-5V application requiring precision and long term
stability.
Other useful benefits of the LMP2012 are rail-rail
output, low supply current of 930 μA, and wide gain-
bandwidth product of 3 MHz. These extremely
versatile features found in the LMP2012 provide high
performance and ease of use.
The QMLV version of the LMP2012 has been rated to
tolerate a total dose level of 50krad/(Si) radiation by
test method 1019 of MIL-STD-883.
Connection Diagram
OUT A
1
IN A^-
2
IN A⁺
3
V^-
4
N/C
5
10
V⁺
9
OUT B
8
IN B^-
7
IN B⁺
6
N/C
Figure 1. 10-Lead CLGA (Top View)
See NAC Package
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2013, Texas Instruments Incorporated