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ISO5852S-EP_17 Datasheet, PDF (1/43 Pages) Texas Instruments – High-CMTI 2.5-A and 5-A Reinforced Isolated IGBT, MOSFET Gate Driver With Split Outputs and Active Protection Features
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ISO5852S-EP
SLLSEW1 – DECEMBER 2016
ISO5852S-EP High-CMTI 2.5-A and 5-A Reinforced Isolated IGBT, MOSFET Gate Driver
With Split Outputs and Active Protection Features
1 Features
•1 100-kV/μs Minimum Common-Mode Transient
Immunity (CMTI) at VCM = 1500 V
• Split Outputs to Provide 2.5-A Peak Source and
5-A Peak Sink Currents
• Short Propagation Delay: 76 ns (Typ),
110 ns (Max)
• 2-A Active Miller Clamp
• Output Short-Circuit Clamp
• Soft Turn-Off (STO) during Short Circuit
• Fault Alarm upon Desaturation Detection is
Signaled on FLT and Reset Through RST
• Input and Output Undervoltage Lockout (UVLO)
with Ready (RDY) Pin Indication
• Active Output Pulldown and Default Low Outputs
with Low Supply or Floating Inputs
• 2.25-V to 5.5-V Input Supply Voltage
• 15-V to 30-V Output Driver Supply Voltage
• CMOS Compatible Inputs
• Rejects Input Pulses and Noise Transients
Shorter Than 20 ns
• Operating Temperature: –55°C to +125°C
Ambient
• Surge Immunity 12800-VPK (according to IEC
61000-4-5)
• Safety-Related Certifications:
– 8000-VPK VIOTM and 2121-VPK VIORM
Reinforced Isolation per DIN V VDE V 0884-10
(VDE V 0884-10):2006-12
– 5700-VRMS Isolation for 1 Minute per UL 1577
– CSA Component Acceptance Notice 5A, IEC
60950-1, IEC 60601-1 and IEC 61010-1 End
Equipment Standards
– CQC Certification per GB4943.1-2011
– All Certifications Complete per UL, VDE, CQC,
TUV and Planned for CSA
2 Applications
• Isolated IGBT and MOSFET Drives in
– Industrial Motor Control Drives
– Industrial Power Supplies
– Solar Inverters
– HEV and EV Power Modules
– Induction Heating
3 Description
The ISO5852S-EP device is a 5.7-kVRMS, reinforced
isolated gate driver for IGBTs and MOSFETs with
split outputs, OUTH and OUTL, providing 2.5-A
source and 5-A sink current. The input side operates
from a single 2.25-V to 5.5-V supply. The output side
allows for a supply range from minimum 15-V to
maximum 30-V. Two complementary CMOS inputs
control the output state of the gate driver. The short
propagation time of 76 ns provides accurate control
of the output stage.
An internal desaturation (DESAT) fault detection
recognizes when the IGBT is in an overcurrent
condition. Upon a DESAT detect, a mute logic
immediately blocks the output of the isolator and
initiates a soft-turnoff procedure which disables the
OUTH pin and pulls the OUTL pin to low over a time
span of 2 μs. When the OUTL pin reaches 2 V with
respect to the most-negative supply potential, VEE2,
the gate-driver output is pulled hard to the VEE2
potential which turns the IGBT immediately off.
When desaturation is active, a fault signal is sent
across the isolation barrier pulling the FLT output at
the input side low and blocking the isolator input.
Mute logic is activated through the soft-turnoff period.
The FLT output condition is latched and can be reset
only after the RDY pin goes high, through a low-
active pulse at the RST input.
Device Information(1)
PART NUMBER PACKAGE
BODY SIZE (NOM)
ISO5852S-EP
SOIC (16)
10.30 mm × 7.50 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
VCC1
IN±
IN+
RDY
VCC1
FLT
VCC1
VCC1
RST
Functional Block Diagram
VCC1
VCC2
UVLO1
UVLO2
Mute
Ready
QS
Fault
QR
Decoder
Gate Drive
and
Encoder
Logic
500 µA
9V
VCC2
DESAT
GND2
OUTH
STO
OUTL
2V
CLAMP
GND1
VEE2
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.