FPD87352 Datasheet, PDF (1/6 Pages) Texas Instruments – FPD87352CXA +3.3V TFT-LCD Timing Controller with Single LVDS Input/Dual RSDS Outputs Including RTC (Response Time Compensation) for TFT-LCD Monitors and TV (XGA/WXGA/HDTV I,II,-)

OBSOLETE
FPD87352
www.ti.com
SNOSAG3C – JULY 2004 – REVISED APRIL 2013
FPD87352CXA +3.3V TFT-LCD Timing Controller with Single LVDS
Input/Dual RSDS™ Outputs Including RTC (Response
Time Compensation) for TFT-LCD Monitors and TV
(XGA/WXGA/HDTV I,II,-)
Check for Samples: FPD87352
FEATURES
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•23 Input Frequency Range from 30 MHz to 95 MHz
• Support Display Resolutions XGA (1024x768),
WXGA (1280x768), HDTV I (1280x768), HDTV II
(1366x768) and HDTV - (1280x800)
• Embedded Gate Array for Custom Panel
Timing
• LVDS Single Pixel Input (8-Bit/6-Bit) Interface
(FPD-Link)
• RSDS Dual Bus Output (8-Bit/6-Bit)
• Drives RSDS Column Drivers up to 47.5 MHz
Clock
• Flexible RSDS Data Output Mapping for
Bottom or Top Mount
• RTC (Response Time Compensation) Function
• 2 Wired Serial EEPROM Interface Support
(RTC LUT)
• Interface with External Frame Memory
• Virtual 8-Bit Color Depth in FRC/Dithering
Mode
• Supports Graphics Controllers with Spread
Spectrum Interface for Lower EMI
• Supports External Spread Spectrum (SSCG)
• DE Only Mode
• CMOS Circuitry Operates from 3.0V–3.6V;
0°C–70°C
• 176 LQFP Package with Body Size 24 mm x 24
mm x 1.4 mm, 0.5 mm Pitch
DESCRIPTION
The FPD87352CXA is an integrated FPD-Link™ +
RSDS + TFT-LCD Timing Controller. The logic
architecture is implemented using standard and
default timing controller functionality based on an
Embedded Gate Array. The device is reconfigurable
to the needs of a specific application by providing
user-defined specifications or customer supplied
VHDL/Verilog code.
The FPD87352CXA is an ideal Timing Controller for
LCD TV Applications. It has a unique feature, RTC
that will improve the intra-gray level response time of
a LCD TV panel. Improving the intra-gray level
response time of the LCD panel will result in a
dramatically improved Motion Picture Image Quality
of video content that are displayed on the LCD panel.
The RTC feature is accomplished through application
of a Boost or Overdrive Voltage that will force the LC
material to respond more rapidly. This Boost or
Overdrive is accomplished through combination of an
internal or external EEPROM LUT (Look Up Table),
which contains the boost/overdrive levels, and
external memory that acts as a Frame Buffer.
The FPD87352CXA is a timing controller that
combines an LVDS single pixel input interface with
National's Reduced Swing Differential Signaling
(RSDS) output column driver interface for
XGA/WXGA/HDTV I,II,- resolutions. It resides on the
Flat Panel Display and provides the data buffering
and control signal generation. FPD-Link, a lower
dynamic power, low EMI (Electro Magnetic
Interference) interface is used between this timing
controller and the host system. A RSDS interface is
used between the timing controller and the column
drivers.
The dual 13/10 pair differential bus conveys up to 24-
bit color data for XGA, WXGA and HDTV panels.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
RSDS is a trademark of Texas Instruments.
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All other trademarks are the property of their respective owners.
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PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2013, Texas Instruments Incorporated