DS90LV028AH_13 Datasheet, PDF (1/16 Pages) Texas Instruments – High Temperature 3V LVDS Dual Differential Line Receiver

NRND
DS90LV028AH
www.ti.com
SNLS201A – SEPTEMBER 2005 – REVISED APRIL 2013
DS90LV028AH High Temperature 3V LVDS Dual Differential Line Receiver
Check for Samples: DS90LV028AH
FEATURES
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•2 -40°C to +125°C Operating Temperature Range
• >400 Mbps (200 MHz) Switching Rates
• 50 ps Differential Skew (Typical)
• 0.1 ns Channel-to-Channel Skew (Typical)
• 2.5 ns Maximum Propagation Delay
• 3.3V Power Supply Design
• Flow-Through Pinout
• Power Down High Impedance on LVDS Inputs
• Low Power Design (18mW @ 3.3V Static)
• LVDS Inputs Accept LVDS/CML/LVPECL
Signals
• Conforms to ANSI/TIA/EIA-644 Standard
• Available in SOIC Package
DESCRIPTION
The DS90LV028AH is a dual CMOS differential line
receiver designed for applications requiring ultra low
power dissipation, low noise and high data rates. The
device is designed to support data rates in excess of
400 Mbps (200 MHz) utilizing Low Voltage Differential
Signaling (LVDS) technology.
The DS90LV028AH accepts low voltage (350 mV
typical) differential input signals and translates them
to 3V CMOS output levels. The DS90LV028AH has a
flow-through design for easy PCB layout.
The DS90LV028AH and companion LVDS line driver
DS90LV027AH provide a new alternative to high
power PECL/ECL devices for high speed point-to-
point interface applications.
Connection Diagram
Figure 1. SOIC
See Package Number D(R-PDSO-G8)
Functional Diagram
Truth Table
INPUTS
[R_IN+] − [R_IN−]
V_ID ≥ 0.1V
V_ID ≤ −0.1V
OUTPUT
R_OUT
H
L
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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