DS34LV86T_14 Datasheet, PDF (1/15 Pages) Texas Instruments – DS34LV86T 3V Enhanced CMOS Quad Differential Line Receiver

DS34LV86T
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SNLS115D – JUNE 2000 – REVISED APRIL 2013
DS34LV86T 3V Enhanced CMOS Quad Differential Line Receiver
Check for Samples: DS34LV86T
FEATURES
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• Low Power CMOS Design (30 mW Typical)
• Interoperable With Existing 5V RS-422
Networks
• Industrial Temperature Range
• Meets TIA/EIA-422-B (RS-422) and ITU-T V.11
Recommendation
• 3.3V Operation
• ±7V Common Mode Range @ V_ID = 3V
• ±10V Common Mode Range @ V_ID = 0.2V
• Receiver OPEN Input Failsafe Feature
• Ensured AC Parameter:
– Maximum Receiver Skew: 4 ns
– Transition Time: 10 ns
• Pin Compatible With DS34C86T
• 32 MHz Toggle Frequency
• >6.5k ESD Tolerance (HBM)
• Available in SOIC Packaging
DESCRIPTION
The DS34LV86T is a high speed quad differential
CMOS receiver that meets the requirements of both
TIA/EIA-422-B and ITU-T V.11. The CMOS
DS34LV86T features typical low static I_CC of 9 mA
which makes it ideal for battery powered and power
conscious applications. The Tri-State enables, EN,
allow the device to be disabled when not in use to
minimize power consumption. The dual enable
scheme allows for flexibility in turning receivers on
and off.
The receiver output (RO) is ensured to be High when
the inputs are left open. The receiver can detect
signals as low as ±200 mV over the common mode
range of ±10V. The receiver outputs (RO) are
compatible with TTL and LVCMOS levels.
Connection Diagram
Figure 1. SOIC (Top View)
See Package Number D
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PRODUCTION DATA information is current as of publication date.
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