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DS26F32MQML_16 Datasheet, PDF (1/15 Pages) Texas Instruments – DS26F32MQML Quad Differential Line Receivers
DS26F32MQML
www.ti.com
SNOSAS5A – MARCH 2006 – REVISED APRIL 2013
DS26F32MQML Quad Differential Line Receivers
Check for Samples: DS26F32MQML
FEATURES
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•2 Input Voltage Range of ±7.0V (Differential or
Common Mode) ±0.2V Sensitivity over the
Input Voltage Range
• High Input Impedance
• Operation from Single +5.0V Supply
• Input Pull-Down Resistor Prevents Output
Oscillation on Unused Channels
• TRI-STATE Outputs, with Choice of
Complementary Enables, for Receiving
Directly onto a Data Bus
DESCRIPTION
The DS26F32 is a quad differential line receiver
designed to meet the requirements of EIA Standards
RS-422 and RS-423, and Federal Standards 1020
and 1030 for balanced and unbalanced digital data
transmission.
The DS26F32 offers improved performance due to
the use of state-of-the-art L-FAST bipolar technology.
The L-FAST technology allows for higher speeds and
lower currents by utilizing extremely short gate delay
times. Thus, the DS26F32 features lower power,
extended temperature range, and improved
specifications.
The device features an input sensitivity of 200 mV
over the input common mode range of ±7.0V. The
DS26F32 provides an enable function common to all
four receivers and TRI-STATE outputs with 8.0 mA
sink capability. Also, a fail-safe input/output
relationship keeps the outputs high when the inputs
are open.
The DS26F32 offers optimum performance when
used with the DS26F31 Quad Differential Line Driver.
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2013, Texas Instruments Incorporated