DS25BR110_13 Datasheet, PDF (1/18 Pages) Texas Instruments – 3.125 Gbps LVDS Buffer with Receive Equalization

DS25BR110
www.ti.com
SNLS255E – MARCH 2007 – REVISED APRIL 2013
DS25BR110 3.125 Gbps LVDS Buffer with Receive Equalization
Check for Samples: DS25BR110
FEATURES
1
•2 DC - 3.125 Gbps Low Jitter, High Noise
Immunity, Low Power Operation
• Four Levels of Receive Equalization Reduce
ISI Jitter
• On-Chip 100Ω Input and Output Termination
Minimizes Insertion and Return Losses,
Reduces Component Count, and Minimizes
Board Space
• 7 kV ESD on LVDS I/O Pins Protects Adjoining
Components
• Small 3 mm x 3 mm 8-WSON Space Saving
Package
APPLICATIONS
• Clock and Data Buffering
• Metallic Cable Equalization
• FR-4 Equalization
DESCRIPTION
The DS25BR110 is a single channel 3.125 Gbps
LVDS buffer optimized for high-speed signal
transmission over lossy FR-4 printed circuit board
backplanes and balanced metallic cables. A fully
differential signal path ensures exceptional signal
integrity and noise immunity.
The DS25BR110 features four levels of receive
equalization (EQ), making it ideal for use as a
receiver device. Other LVDS devices with similar IO
characteristics include the following products. The
DS25BR120 features four levels of pre-emphasis for
use as an optimized driver device, while the
DS25BR100 features both pre-emphasis and
equalization for use as an optimized repeater device.
The DS25BR150 is a buffer/repeater with the lowest
power consumption and does not feature transmit
pre-emphasis nor receive equalization.
Wide input common mode range allows the receiver
to accept signals with LVDS, CML and LVPECL
levels; the output levels are LVDS. A very small
package footprint requires minimal space on the
board while the flow-through pinout allows easy board
layout. The differential inputs and outputs are
internally terminated with a 100Ω resistor to lower
device input and output return losses, reduce
component count, and further minimize board space.
Typical Application
ASIC / FPGA
CML
LVDS
LVPECL
EQ
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BR110 LVDS ^{ASIC / FPGA}
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2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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