CY54FCT646T_14 Datasheet, PDF (1/15 Pages) Texas Instruments – 8-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

CY54FCT646T, CY74FCT646T
8-BIT REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCCS031A – JULY 1994 – REVISED OCTOBER 2001
D Function, Pinout, and Drive Compatible
With FCT and F Logic
D Reduced V_OH (Typically = 3.3 V) Versions
of Equivalent FCT Functions
D Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
D I_off Supports Partial-Power-Down Mode
Operation
D Matched Rise and Fall Times
D Fully Compatible With TTL Input and
Output Logic Levels
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
CY54FCT646T . . . D PACKAGE
CY74FCT646T . . . Q OR SO PACKAGE
(TOP VIEW)
CPAB ₁
SAB ₂
DIR 3
A₁ 4
A₂ 5
A₃ 6
A₄ 7
A₅ 8
A₆ 9
A₇ 10
A₈ 11
GND 12
24 ^V_CC
23 ^CPBA
22 SBA
21 G
20 B₁
19 B₂
18 B₃
17 B₄
16 B₅
15 B₆
14 B₇
13 B₈
– 1000-V Charged-Device Model (C101)
D Independent Register for A and B Buses
D CY54FCT646T
CY54FCT646T . . . L PACKAGE
(TOP VIEW)
– 48-mA Output Sink Current
– 12-mA Output Source Current
D CY74FCT646T
– 64-mA Output Sink Current
– 32-mA Output Source Current
D 3-State Outputs
4 3 2 1 28 27 26
A₁ 5
25 G
A₂ 6
24 B₁
A3 7
23 B₂
NC 8
22 NC
description
The ’FCT646T devices consist of a bus
transceiver circuit with 3-state, D-type flip-flops,
A₄ 9
21 B₃
A₅ 10
20 B₄
A₆ 11
19 B₅
12 13 14 15 16 17 18
and control circuitry arranged for multiplexed
transmission of data directly from the input bus or
from the internal registers. Data on the A or B bus
is clocked into the registers as the appropriate
NC – No internal connection
clock pin goes to a high logic level. Output-enable (G) and direction (DIR) inputs control the transceiver function.
In the transceiver mode,data present at the high-impedance port can be stored in either the A or B register, or
in both. Select controls (SAB, SBA) can multiplex stored and real-time (transparent mode) data. DIR determines
which bus receives data when G is low. In the isolation mode (G is high), A data can be stored in the B register
and/or B data can be stored in the A register.
These devices are fully specified for partial-power-down applications using I_off. The I_off circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright  2001, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
1