CSD95481RWJ Datasheet, PDF (1/15 Pages) Texas Instruments – Synchronous Buck NexFET Smart Power Stage

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CSD95481RWJ
SLPS674 – JUNE 2017
CSD95481RWJ Synchronous Buck NexFET™ Smart Power Stage
1 Features
•1 60-A Continuous Operating Current Capability
• Over 95% System Efficiency at 30 A
• High-Frequency Operation (up to 1.25 MHz)
• Diode Emulation Function
• Temperature Compensated Bi-Directional Current
Sense
• Analog Temperature Output
• Fault Monitoring
• 3.3-V and 5-V PWM Signal Compatible
• Tri-State PWM Input
• Integrated Bootstrap Switch
• Optimized Dead Time for Shoot-Through
Protection
• High-Density QFN 5-mm × 6-mm Footprint
• Ultra-Low-Inductance Package
• System Optimized PCB Footprint
• Thermally Enhanced Topside Cooling
• RoHS Compliant – Lead-Free Terminal Plating
• Halogen Free
2 Applications
• Multiphase Synchronous Buck Converters
– High-Frequency Applications
– High-Current, Low-Duty Cycle Applications
• POL DC-DC Converters
• Memory and Graphic Cards
• Desktop and Server VR12.x / VR13.x V-Core
Synchronous Buck Converters
3 Description
The CSD95481RWJ NexFET™ power stage is a
highly optimized design for use in a high-power, high-
density synchronous buck converter. This product
integrates the driver IC and power MOSFETs to
complete the power stage switching function. This
combination produces high-current, high-efficiency,
and high-speed switching capability in a small 5-mm
× 6-mm outline package. It also integrates the
accurate current sensing and temperature sensing
functionality to simplify system design and improve
accuracy. In addition, the PCB footprint has been
optimized to help reduce design time and simplify the
completion of the overall system design.
Application Diagram
AVSP
AVSN
TPS53679
PWM1
ASKIP#
P12V
P5V
VIN
BOOT BOOT_R
PWM CSD95481RWJ VOS
EN/FCCM
VDD
PVDD
LSET
VSW
TAO
PGND IOUT REFIN
Device Information⁽¹⁾
DEVICE
MEDIA
QTY
PACKAGE
CSD95481RWJ 13-Inch Reel
CSD95481RWJT 7-Inch Reel
2500
250
QFN
5.00-mm × 6.00-mm
Package
SHIP
Tape
and
Reel
(1) For all available packages, see the orderable addendum at
LOAD
the end of the data sheet.
VREF
ADDR
3.3 V
V3P3
P12V
VIN_CSNIN
VCCIO
CSPIN
BEN_VCCIO
SCLK
SDIO
SALERT#
PIN_ALT#
VR_HOT#
SMB_CLK
SMB_ALERT
#
SMB_DIO
AVR_RDY
BVR_RDY
AVR_EN
VR_FAULT#
RESET#
AGND
ACSP1
TSEN
APWM6
ACSP6
VREF
BVSN
BVSP
BPWM1
BSKIP#
BCSP1
P12V
VIN
BOOT BOOT_R
PWM CSD95481RWJ VOS
P5V ^EN/FCCM
VSW
VDD
PVDD
TAO
LSET PGND IOUT REFIN
P12V
P5V
VIN
BOOT BOOT_R
PWM CSD95492QVM VOS
EN/FCCM
VDD
PVDD
LSET
VSW
TAO
PGND IOUT REFIN
Typical Power Stage Efficiency and Power Loss
100
14
90
12
80
10
70
8
60
6
50
4
40
2
LOAD
30
0
0
10
20
30
40
50
60
Output Current (A)
D000
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.