CDCLVP2104 Datasheet, PDF (1/22 Pages) Texas Instruments – Eight LVPECL Output, High-Performance Clock Buffer

CDCLVP2104
www.ti.com
SCAS889A – OCTOBER 2009 – REVISED AUGUST 2011
Eight LVPECL Output,
High-Performance Clock Buffer
Check for Samples: CDCLVP2104
FEATURES
1
•2 Dual 1:4 Differential Buffer
• Two Clock Inputs
• Universal Inputs Can Accept LVPECL, LVDS,
LVCMOS/LVTTL
• Eight LVPECL Outputs
• Maximum Clock Frequency: 2 GHz
• Maximum Core Current Consumption: 78 mA
• Very Low Additive Jitter: <100 fs,rms in 10-kHz
to 20-MHz Offset Range
• 2.375 V to 3.6 V Device Power Supply
• Maximum Propagation Delay: 450 ps
• Maximum 15 ps Within Bank Output Skew
• LVPECL Reference Voltage, V_{AC_REF}, Available
for Capacitive-Coupled Inputs
• Industrial Temperature Range: –40°C to +85°C
• Available in 5-mm × 5-mm QFN-28 (RHD)
Package
• ESD Protection Exceeds 2 kV (HBM)
APPLICATIONS
• Wireless Communications
• Telecommunications/Networking
• Medical Imaging
• Test and Measurement Equipment
DESCRIPTION
The CDCLVP2104 is a highly versatile, low additive
jitter buffer that can generate eight copies of LVPECL
clock outputs from two LVPECL, LVDS, or LVCMOS
inputs for a variety of communication applications. It
has a maximum clock frequency up to 2 GHz. Each
buffer block consists of one input that feeds two
LVPECL outputs. The overall additive jitter
performance is less than 0.1 ps, RMS from 10 kHz to
20 MHz, and overall output skew is as low as 15 ps,
making the device a perfect choice for use in
demanding applications.
The CDCLVP2104 clock buffer distributes two clock
inputs (IN0, IN1) to eight pairs of differential LVPECL
clock outputs (OUT0, OUT7) with minimum skew for
clock distribution. Each buffer block consists of one
input that feeds two LVPECL clock outputs. The
inputs can be LVPECL, LVDS, or LVCMOS/LVTTL.
The CDCLVP2104 is specifically designed for driving
50-Ω transmission lines. When driving the inputs in
single-ended mode, the LVPECL bias voltage
(V_{AC_REF}) should be applied to the unused negative
input pin. However, for high-speed performance up to
2 GHz, differential mode is strongly recommended.
The CDCLVP2104 is characterized for operation
from –40°C to +85°C and is available in a QFN-28,
5-mm × 5-mm package.
V_CC
V_CC
V_CC
INP0
INN0
INP1
INN1
LVPECL
LVPECL
OUTP[3...0]
4
OUTN[3...0]
4
OUTP[7...4]
4
OUTN[7...4]
4
V_{AC_REF[1, 0]}
2
Reference
Generator
CDCLVP2104
GND
GND
1
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2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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