CDCLVP111-EP Datasheet, PDF (1/15 Pages) Texas Instruments – LOW-VOLTAGE 1:10 LVPECL WITH SELECTABLE INPUT CLOCK DRIVER

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CDCLVP111-EP
SCAS933 – DECEMBER 2012
LOW-VOLTAGE 1:10 LVPECL WITH SELECTABLE INPUT CLOCK DRIVER
Check for Samples: CDCLVP111-EP
FEATURES
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• Distributes One Differential Clock Input Pair
LVPECL to 10 Differential LVPECL
• Fully Compatible With LVECL and LVPECL
• Supports a Wide Supply Voltage Range From
2.375 V to 3.8 V
• Selectable Clock Input Through CLK_SEL
• Low-Output Skew (Typ 15 ps) for Clock-
Distribution Applications
– Additive Jitter Less Than 1 ps
– Propagation Delay Less Than 355 ps
– Open Input Default State
– LVDS, CML, SSTL input compatible
• V_BB Reference Voltage Output for Single-
Ended Clocking
• Available in a 32-Pin LQFP Package
• Frequency Range From DC to 3.5 GHz
• Pin-to-Pin Compatible With MC100 Series
EP111, ES6111, LVEP111, PTN1111
SUPPORTS DEFENSE, AEROSPACE,
AND MEDICAL APPLICATIONS
• Controlled Baseline
• One Assembly and Test Site
• One Fabrication Site
• Available in Military (–55°C to 125°C)
Temperature Range ⁽¹⁾
• Extended Product Life Cycle
• Extended Product-Change Notification
• Product Traceability
VF PACKAGE
(TOP VIEW)
APPLICATIONS
• Designed for Driving 50 Ω Transmission Lines
• High Performance Clock Distribution
(1) Custom temperature ranges available
DESCRIPTION
The CDCLVP111 clock driver distributes one differential clock pair of LVPECL input, (CLK0, CLK1) to ten pairs of
differential LVPECL clock (Q0, Q9) outputs with minimum skew for clock distribution. The CDCLVP111 can
accept two clock sources into an input multiplexer. The CDCLVP111 is specifically designed for driving 50-Ω
transmission lines. When an output pin is not used, leaving it open is recommended to reduce power
consumption. If only one of the output pins from a differential pair is used, the other output pin must be identically
terminated to 50 Ω.
The V_BB reference voltage output is used if single-ended input operation is required. In this case, the V_BB pin
should be connected to CLK0 and bypassed to GND via a 10-nF capacitor.
However, for high-speed performance up to 3.5 GHz, the differential mode is strongly recommended.
The CDCLVP111 is characterized for operation from –55°C to 125°C.
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2012, Texas Instruments Incorporated