CDC2351-EP Datasheet, PDF (1/10 Pages) Texas Instruments – 1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

D Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
D Extended Temperature Performance of
−55°C to 125°C
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product-Change Notification
D Qualification Pedigree^†
D Low Output Skew, Low Pulse Skew for
Clock-Distribution and Clock-Generation
Applications
D Operates at 3.3-V V_CC
D LVTTL-Compatible Inputs and Outputs
D Supports Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V V_CC)
D Distributes One Clock Input to 10 Outputs
† _{Component qualification in accordance with JEDEC and industry}
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
CDC2351ĆEP
1ĆLINE TO 10ĆLINE CLOCK DRIVER
WITH 3ĆSTATE OUTPUTS
SGLS248A − JUNE 2004 − REVISED AUGUST 2004
D Outputs Have Internal Series Damping
Resistor to Reduce Transmission Line
Effects
D Distributed V_CC and Ground Pins Reduce
Switching Noise
D State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
D Shrink Small-Outline (DB) Package
DB PACKAGE
(TOP VIEW)
GND 1
Y10 2
V_CC 3
Y9 4
OE 5
A6
P0 7
P1 8
Y8 ⁹
V_CC ¹⁰
Y7 ¹¹
GND ¹²
24 GND
23 Y1
22 V_CC
21 Y2
20 GND
19 Y3
18 Y4
17 GND
16 _Y5
15 _VCC
14 _Y6
13 _GND
description
The CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to 10 outputs (Y) with
minimum skew for clock distribution. The output-enable (OE) input disables the outputs to a high-impedance
state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351
operates at nominal 3.3-V V_CC.
The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure
that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended
for customer use and should be connected to GND.
The CDC2351M is characterized for operation over the full military temperature range of −55°C to 125°C.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
−55°C to 125°C SSOP − DB Tape and Reel CDC2351MDBREP
CK2351MEP
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design}
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙΒ is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2004, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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