CD74HC08-Q1 Datasheet, PDF (1/7 Pages) Texas Instruments – QUADRUPLE 2-INPUT POSITIVE-AND GATE

CD74HC08-Q1
QUADRUPLE 2-INPUT POSITIVE-AND GATE
D Qualified for Automotive Applications
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Buffered Inputs
D Typical Propagation Delay 7 ns
at V_CC = 5 V, C_L = 15 pF, T_A = 25°C
D Fanout (Over Temperature Range)
− Standard Outputs . . . 10 LSTTL Loads
− Bus Driver Outputs . . . 15 LSTTL Loads
D Extended Temperature Performance of
−40°C to 125°C
D Balanced Propagation Delay and Transition
Times
D Significant Power Reduction, Compared to
LSTTL Logic ICs
SCLS512A − JULY 2003 − REVISED FEBRUARY 2008
D 2-V to 6-V V_CC Operation
D High Noise Immunity N_IL or N_IH = 30% of
V_CC at V_CC = 5 V
D CMOS Input Compatibility, I_l ≤ 1 µA at V_OL,
V_OH
M PACKAGE
(TOP VIEW)
1A 1
1B ²
1Y ³
2A ⁴
2B ⁵
2Y ⁶
GND ⁷
14 V_CC
13 4B
12 4A
11 4Y
10 3B
9 3A
8 _3Y
description/ordering information
The CD74HC08 logic gates utilize silicon-gate CMOS technology to achieve operating speeds similar to LSTTL
gates, with the low power consumption of standard CMOS integrated circuits. The device can drive 10 LSTTL
loads.
ORDERING INFORMATION^†
T_A
PACKAGE^‡
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
−40°C to 125°C SOIC − M
Tape and reel CD74HC08QM96Q1
HC08Q
† _{For the most current package and ordering information, see the Package Option Addendum at the end of this}
document, or see the TI web site at http://www.ti.com.
‡ _{Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.}
FUNCTION TABLE
(each gate)
INPUTS
A
B
OUTPUT
Y
H
H
H
L
X
L
X
L
L
logic diagram (positive logic)
A
Y
B
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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