CD74FCT574 Datasheet, PDF (1/11 Pages) Texas Instruments – BiCMOS OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

CD74FCT574
BiCMOS OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
SCBS745 – JULY 2000
D BiCMOS Technology With Low Quiescent
Power
D Buffered Inputs
D Noninverted Outputs
D Input/Output Isolation From V_CC
D Controlled Output Edge Rates
D 48-mA Output Sink Current
D Output Voltage Swing Limited to 3.7 V
D SCR Latch-Up-Resistant BiCMOS Process
and Circuit Design
D 3-State Outputs Drive Bus Lines Directly
D Package Options Include Plastic
Small-Outline (M) and Shrink Small-Outline
(SM) Packages and Standard Plastic (E) DIP
E, M, OR SM PACKAGE
(TOP VIEW)
OE 1
1D 2
2D 3
3D 4
4D 5
5D 6
6D 7
7D 8
8D 9
GND 10
20 V_CC
19 1Q
18 2Q
17 3Q
16 4Q
15 5Q
14 6Q
13 7Q
12 8Q
11 CLK
description
The CD74FCT574 is an octal, D-type, edge-triggered flip-flop that features noninverted, 3-state outputs,
designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly
suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
This device uses a small-geometry BiCMOS technology. The output stage is a combination of bipolar and
CMOS transistors that limits the output high level to two diode drops below V_CC. This resultant lowering of output
swing (0 V to 3.7 V) reduces power-bus ringing [a source of electromagnetic interference (EMI)] and minimizes
V_CC bounce and ground bounce and their effects during simultaneous output switching. The output
configuration also enhances switching speed and is capable of sinking 48 mA.
The eight flip-flops enter data into their registers on the low-to-high transition of the clock (CLK). On the positive
transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.
The output-enable (OE) input controls the 3-state outputs and is independent of the register operation. OE can
be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance
state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. Old data can
be retained or new data can be entered while the outputs are in the high-impedance state.
The CD74FCT574 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OE CLK D
OUTPUT
Q
L
↑
H
H
L
↑
L
L
L H or L X
Q0
H
X
X
Z
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright © 2000, Texas Instruments Incorporated
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