CD74ACT10_14 Datasheet, PDF (1/12 Pages) Texas Instruments – TRIPLE 3-INPUT POSITIVE-NAND GATES

CD74ACT10
TRIPLE 3-INPUT POSITIVE-NAND GATES
D Inputs Are TTL-Voltage Compatible
D Speed of Bipolar F, AS, and S, With
Significantly Reduced Power Consumption
D Balanced Propagation Delays
D ±24-mA Output Drive Current
– Fanout to 15 F Devices
D SCR Latchup-Resistant CMOS Process and
Circuit Design
D Exceeds 2-kV ESD Protection Per
MIL-STD-883, Method 3015
SCHS316 – NOVEMBER 2002
E OR M PACKAGE
(TOP VIEW)
1A 1
1B 2
2A 3
2B 4
2C 5
2Y 6
GND 7
14 V_CC
13 1C
12 1Y
11 3C
10 3B
9 3A
8 3Y
description/ordering information
The CD74ACT10 contains three independent 3-input NAND gates. The device performs the Boolean functions
Y = A • B • C or Y = A + B + C in positive logic.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – E
Tube
CD74ACT10E
CD74ACT10E
–55°C to 125°C
SOIC – M
Tube
CD74ACT10M
Tape and Reel CD74ACT10M96
ACT10M
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines}
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
INPUTS
A
B
C
OUTPUT
Y
H
H
H
L
L
X
X
H
X
L
X
H
X
X
L
H
logic diagram, each gate (positive logic)
A
B
Y
C
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright  2002, Texas Instruments Incorporated
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