AFE1224 Datasheet, PDF (1/13 Pages) Burr-Brown (TI) – 2Mbps, Single Pair ANALOG FRONT END

®
AFE1224
AFE1224
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information, visit www.burr-brown.com
2Mbps, Single Pair ANALOG FRONT END
FEATURES
q E1/T1 SINGLE PAIR 2B1Q
q PROGRAMMABLE POWER DISSIPATION
q 28-LEAD SSOP
q 64kbps TO 2320kbps OPERATION
q SCALEABLE DATA RATE
q PIN COMPATIBLE WITH AFE1124
q COMPLETE ANALOG INTERFACE
q –40°C TO +85°C OPERATION
DESCRIPTION
Burr-Brown’s Analog Front End minimizes the size
and cost of a single pair High bit rate Digital Sub-
scriber Line (HDSL) system by providing all of the
active analog circuitry needed to connect an HDSL
digital signal processor to an external compromise
hybrid and an HDSL line transformer. The transmit
and receive filter responses automatically change with
clock frequency, allowing the AFE1224 to operate
over a wide range of data rates. The power dissipation
of the device can be reduced under digital control for
operation at lower speeds. The AFE1224 will operate
at bit rates from 64kbps to 2.320Mbps.
Functionally, this unit consists of a transmit and a
receive section. The transmit section generates analog
signals from 2-bit digital symbol data and filters the
analog signals to create 2B1Q symbols. The on-board
differential line driver provides a 13.5dBm signal to
the telephone line. The receive section filters and
digitizes the symbol data received on the telephone
line. The AFE1224 operates on a single 5V supply.
The digital circuitry in the unit can be connected to a
supply from 3.3V to 5V. The chip uses only 355mW
for full-speed operation. It is housed in a 28-lead
SSOP package.
Pulse Former
tx and rx
Interface
Lines
tx and rx
Control
Registers
Decimation
Filter
∆Σ
Modulator
AFE1224
Line Driver
txLINE
txLINE
PGA
Difference
Amplifier
rxHYB
rxHYB
rxLINE
rxLINE
Patents Pending
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©_{1999 Burr-Brown Corporation}
PDS-1548A
Printed in U.S.A. June, 1999