ADS8555_16 Datasheet, PDF (1/43 Pages) Texas Instruments – 16-Bit, Six-Channel, Simultaneous Sampling Analog-to-Digital Converter

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ADS8555
SBAS531D – DECEMBER 2010 – REVISED FEBRUARY 2016
ADS8555
16-Bit, Six-Channel, Simultaneous Sampling Analog-to-Digital Converter
1 Features
•1 Six SAR ADCs Grouped in Three Pairs
• Maximum Data Rate Per Channel With Internal
Clock and Reference:
630 kSPS (Parallel) or 450 kSPS (Serial)
• Maximum Data Rate Per Channel With External
Clock and Reference:
800 kSPS (Parallel) or 500 kSPS (Serial)
• Pin-Selectable or Programmable Input Voltage
Ranges: Up to ±12 V
• Excellent AC Performance:
91.5-dB SNR, –94-dB THD
• Programmable and Buffered Internal Reference:
0.5 V to 2.5 V and 0.5 V to 3 V
• Comprehensive Power-Down Modes:
– Deep Power Down (Standby Mode)
– Auto-Nap Power Down
• Selectable Parallel or Serial Interface
• Operating Temperature Range: –40°C to 125°C
• LQFP-64 Package
2 Applications
• Power Quality Measurements
• Protection Relays
• Multi-Axis Motor Controls
• Programmable Logic Controllers
• Industrial Data Acquisition
SNR vs Temperature
94
92
90
88
86
84
82
80
78 ^{AVDD = BVDD = 5V}
HVSS = -15V, HVDD = 15V
76 _{fSIGNAL = 10kHz, fDATA = Max}
74 _{Range = ±4 ´ VREF}
72 _{Internal Reference}
70
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (°C)
3 Description
The ADS8555 device contains six low-power, 16-bit,
successive approximation register (SAR)-based
analog-to-digital converters (ADCs) with true bipolar
inputs. Each channel contains a sample-and-hold
circuit that allows simultaneous high-speed multi-
channel signal acquisition.
The ADS8555 device supports data rates of up to
630 kSPS in parallel interface mode or up to
450 kSPS if the serial interface is used. The bus
width of the parallel interface can be set to eight or 16
bits. In serial mode, up to three output channels can
be activated.
The ADS8555 device is specified over the extended
industrial temperature range of –40°C to 125°C and is
available in an LQFP-64 package.
Device Information⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
ADS8555
LQFP (64)
10.00 mm × 10.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Block Diagram
HVDD HVSS AVDD
BVDD
CH_A0
AGND
CONVST_A
REFC_A
CH_A1
AGND
CH_B0
AGND
CONVST_B
REFC_B
CH_B1
AGND
CH_C0
AGND
CONVST_C
REFC_C
CH_C1
AGND
Clock
Generator
SAR ADC
SAR ADC
SAR ADC
SAR ADC
SAR ADC
SAR ADC
Control
Logic
Config
Register
I/O
BUSY/INT
RANGE/XCLK
HW/SW
REF_EN/WR
STBY
RESET
CS/FS
RD
DB[15:0]
WORD/BYTE
PAR/SER
REF_IO
String
DAC
2.5V/3V
REF
AGND
BGND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.