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ADC34J42 Datasheet, PDF (1/90 Pages) Texas Instruments – ADC34J4x Quad-Channel, 14-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter with a JESD204B Interface | |||
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ADC34J42, ADC34J43, ADC34J44, ADC34J45
SBAS664B â MAY 2014 â REVISED NOVEMBER 2014
ADC34J4x Quad-Channel, 14-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter
with a JESD204B Interface
1 Features
â¢1 Quad Channel
⢠14-Bit Resolution
⢠Single 1.8-V Supply
⢠Flexible Input Clock Buffer with Divide-by-1, -2, -4
⢠SNR = 72 dBFS, SFDR = 86 dBc at
fIN = 70 MHz
⢠Ultra-Low Power Consumption:
â 203 mW/Ch at 160 MSPS
⢠Channel Isolation: 105 dB
⢠Internal Dither
⢠JESD204B Serial Interface:
â Supports Subclass 0, 1, 2
â Supports One Lane per ADC up to 160 MSPS
⢠Support for Multi-Chip Synchronization
⢠Pin-to-Pin Compatible with 12-Bit Version
⢠Package: VQFN-48 (7 mm à 7 mm)
2 Applications
⢠Multi-Carrier, Multi-Mode Cellular Base Stations
⢠Radar and Smart Antenna Arrays
⢠Munitions Guidance
⢠Motor Control Feedback
⢠Network and Vector Analyzers
⢠Communications Test Equipment
⢠Nondestructive Testing
⢠Microwave Receivers
⢠Software Defined Radios (SDRs)
⢠Quadrature and Diversity Radio Receivers
3 Description
The ADC34J4x is a high-linearity, ultra-low power,
quad-channel, 14-bit, 50-MSPS to 160-MSPS,
analog-to-digital converter (ADC). The devices are
designed specifically to support demanding, high
input frequency signals with large dynamic range
requirements. A clock input divider allows more
flexibility for system clock architecture design while
the SYSREF input enables complete system
synchronization. The ADC34J4x family supports
serial current-mode logic (CML) and JESD204B
interfaces in order to reduce the number of interface
lines, thus allowing high system integration density.
The JESD204B interface is a serial interface, where
the data of each ADC are serialized and output over
only one differential pair. An internal phase-locked
loop (PLL) multiplies the incoming ADC sampling
clock by 20 to derive the bit clock that is used to
serialize the 14-bit data from each channel. The
ADC34J4x devices support subclass 1 with interface
speeds up to 3.2 Gbps.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
ADC34J4x
VQFN (48)
7.00 mm à 7.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
FFT with Dither On
(fS = 160 MSPS, fIN = 10 MHz, SNR = 72.5 dBFS,
SFDR = 88 dBc)
0
±20
±40
±60
±80
±100
±120
0
16
32
48
64
80
Frequency (MHz)
C001
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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