74ACT11825 Datasheet, PDF (1/7 Pages) Texas Instruments – 8-BIT BUS-INTERFACE FLIP-FLOP

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74ACT11825
8ĆBIT BUSĆINTERFACE FLIPĆFLOP
WITH 3ĆSTATE OUTPUTS
SCAS154A − D3715, NOVEMBER 1990 − REVISED APRIL 1993
• Inputs Are TTL-Voltage Compatible
• Multiple Output Enables Allow Multiuser
Control of the Interface
• Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin V_CC and GND Configurations
Minimize High-Speed Switching Noise
• EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
• 500-mA Typical Latch-Up Immunity at 125°C
description
This device contains eight flip-flops that feature
3-state outputs designed specifically for driving
highly-capacitive or relatively low-impedance
loads. They are particularly suitable for
implementing multiuser registers, I/O ports,
bidirectional bus drivers, and working registers.
DW PACKAGE
(TOP VIEW)
OE1 ₁
1Q ₂
2Q ₃
3Q ₄
4Q ₅
GND ₆
GND 7
GND 8
GND 9
5Q 10
6Q 11
7Q 12
8Q 13
CLR 14
28 ^OE2
27 ^OE3
26 ^1D
25 ^2D
24 ^3D
23 ^4D
22 V_CC
21 V_CC
20 5D
19 6D
18 7D
17 8D
16 CLKEN
15 CLK
With the clock-enable (CLKEN) input low, the eight edge-triggered D-type flip-flops enter data on the low-to-high
transition of the clock. Taking CLKEN high disables the clock buffer, thus latching the outputs. The 74ACT11825
has noninverting data (D) inputs. Taking the clear (CLR) input low causes the eight Q outputs to go low
independently of the clock.
Multiuser buffered output-enable (OE1, OE2, and OE3) inputs can be used to place the eight outputs in either
a normal logic state (high or low logic level) or a high-impedance state. In the high-impedance state, the outputs
neither load nor drive the bus lines significantly.
The high-impedance state and increased drive provide the capability to drive bus lines without need for interface
or pullup components. The output enable (OE) does not affect the internal operation of the flip-flops. Old data
can be retained or new data can be entered while the outputs are in the high-impedance state.
The 74ACT11825 is characterized for operation from − 40°C to 85°C.
FUNCTION TABLE
INPUTS
OE† CLR CLKEN CLK
OUTPUT
D
Q
L
L
X
X
X
L
L
H
L
↑
H
H
L
H
L
↑
L
L
L
H
H
X
X
Q0
H
X
X
X
X
Z
† _{OE = H if any of OE1, OE2, or OE3 are high.}
OE = L if all of OE1, OE2, or OE3 are low.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright  1993, Texas Instruments Incorporated
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