74ACT11821 Datasheet, PDF (1/7 Pages) Texas Instruments – 10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

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• Inputs Are TTL-Voltage Compatible
• Provides Extra Data Width Necessary for
Wider Address/Data Paths or Buses With
Parity
• Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin V_CC and GND Configurations
Minimize High-Speed Switching Noise
• EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
• 500-mA Typical Latch-Up Immunity at 125°C
• Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Ceramic 300-mil
DIPs
description
54ACT11821, 74ACT11821
10ĆBIT BUSĆINTERFACE FLIPĆFLOPS
WITH 3ĆSTATE OUTPUTS
SCAS156A − NOVEMBER 1990 − REVISED APRIL 1993
54ACT11821 . . . JT PACKAGE
74ACT11821 . . . DW PACKAGE
(TOP VIEW)
1Q 1
2Q 2
3Q 3
4Q 4
5Q 5
GND 6
GND 7
GND 8
GND 9
6Q 10
7Q ¹¹
8Q ¹²
9Q ¹³
10Q ¹⁴
28 OE
27 1D
26 2D
25 3D
24 4D
23 5D
22 V_CC
21 V_CC
20 6D
19 7D
18 _8D
17 _9D
16 _10D
15 _CLK
These 10-bit flip-flops feature 3-state outputs
designed specifically for driving highly-capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing wider buffer
registers, I/O ports, bidirectional bus drivers with
parity, and working registers.
On the positive transition of the clock the Q outputs
will follow the D inputs.
A buffered output enable (OE) input can be used
to place the ten outputs in either a normal logic
state (high or low level) or a high-impedance state.
In the high-impedance state the outputs neither
load nor drive the bus lines significantly.
The high-impedance state and increased drive
provide the capability to drive the bus lines in a
bus-organized system without need for interface
or pull-up components.
54ACT11821 . . . FK PACKAGE
(TOP VIEW)
4 3 2 1 28 27 26
2D 5
25 8D
1D 6
24 9D
OE 7
23 10
1Q 8
22 CLK
2Q 9
21 10Q
3Q 10
20 9Q
4Q 11
19 8Q
12 13 14 15 16 17 18
The output enable (OE)does not affect the internal operation of the flip-flops. Old data can be retained or new
data can be entered while the outputs are in the high-impedance state.
The 54ACT11821 is characterized for operation over the full military temperature range of −55°C to 125°C. The
74ACT11821 is characterized for operation form − 40°C to 85°C.
EPIC is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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Copyright  1993, Texas Instruments Incorporated
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