74ACT11651 Datasheet, PDF (1/9 Pages) Texas Instruments – OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS

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• Inputs Are TTL-Voltage Compatible
• Bus Transceivers/Registers
• Independent Registers and Enables for A
and B Buses
• Multiplexed Real-Time and Stored Data
• Inverting Data Paths
• Flow-Through Architecture to Optimize
PCB Layout
• Center-Pin V_CC and GND Configurations to
Minimize High-Speed Switching Noise
• EPICt (Enhanced-Performance Implanted
CMOS) 1-mm Process
• 500-mA Typical Latch-Up Immunity
at 125°C
• Package Options Include Plastic Small
Outline Packages and Standard Plastic
300-mil DIPs
74ACT11651
OCTAL BUS TRANSCEIVER AND REGISTER
WITH 3ĆSTATE OUTPUTS
SCAS134 − D3445, MARCH 1990 − REVISED APRIL 1993
DW OR NT PACKAGE
(TOP VIEW)
GAB 1
A1 2
A2 3
A3 4
A4 5
GND 6
GND ⁷
GND ⁸
GND ⁹
A5 ¹⁰
A6 ¹¹
A7 ¹²
A8 ¹³
GBA ¹⁴
28 CAB
27 SAB
26 B1
25 B2
24 B3
23 B4
22 _VCC
21 _VCC
20 _B5
19 _B6
18 _B7
17 _B8
16 _CBA
15 _SBA
description
These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed
transmission of data directly from the data bus or from the internal storage registers. Enables GAB and GBA
are provided to control the transceiver functions. SAB and SBA control pins are provided to select whether
real-time or stored data is transferred. The circuitry used for select control eliminates the typical decoding glitch
that occurs in a multiplexer during the transition between stored and real-time data.
A low input level selects real-time data and a high selects stored data. Figure 1 illustrates the four fundamental
bus-management functions that can be performed with the octal bus transceivers and registers. Data on the
A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock
pins (CAB or CBA) regardless of the select or enable control pins. When SAB and SBA are in the real-time
transfer mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously
enabling GAB and GBA. In this configuration, each output reinforces its input. Thus, when all other data sources
to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state.
The 74ACT11651 is characterized for operation from − 40°C to 85°C.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright  1993, Texas Instruments Incorporated
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