74ACT11378 Datasheet, PDF (1/6 Pages) Texas Instruments – HEX D-TYPE FLIP-FLOP WITH CLOCK ENABLE

• Inputs Are TTL-Voltage Compatible
• Contains Six D-Type Flip-Flops
• Clock Enable Latched to Avoid False
Clocking
• Applications Include: Buffer/Storage
Registers, Shift Registers, Pattern
Generators
• Flow-Through Architecture Optimizes PCB
Layout
• Center-Pin V_CC and GND Pin Configurations
Minimize High-Speed Switching Noise
• EPIC  (Enhanced-Performance Implanted
CMOS) 1-µm Process
• 500-mA Typical Latch-Up Immunity at 125°C
• Package Options Include Plastic
Small-Outline Packages, and Standard
Plastic 300-mil DIPs
74ACT11378
HEX D-TYPE FLIP-FLOP
WITH CLOCK ENABLE
SCAS185A − AUGUST 1990 − REVISED APRIL 1993
DW OR N PACKAGE
(TOP VIEW)
1Q ₁
2Q 2
3Q 3
GND 4
GND 5
GND 6
GND 7
4Q ⁸
5Q ⁹
6Q ¹⁰
20 ^CLKEN
19 1D
18 2D
17 3D
16 V_CC
15 V_CC
14 4D
13 _5D
12 _6D
11 _CLK
description
These circuits are positive-edge-triggered D-type flip-flops with a clock-enable input. Information at the D inputs
meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse
if the clock-enable input (CLKEN) is low.
Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the
positive-going pulse. When the clock inputs are at either the high or low level, the data (D) input signal has no
effect at the output. The circuits are designed to prevent false clocking by transitions at the clock-enable
(CLKEN) input.
The 74ACT11378 is characterized for operation from − 40°C to 85°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
CLKEN CLK D
OUTPUT
Q
H
X
X
QO
L
↑
H
H
L
↑
L
L
X
L
X
QO
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  1993, Texas Instruments Incorporated
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