74ACT11160 Datasheet, PDF (1/9 Pages) Texas Instruments – SYNCHRONOUS 4-BIT DECADE COUNTER

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• Inputs Are TTL-Voltage Compatible
• Internal Look-Ahead for Fast Counting
• Carry Output for N-Bit Cascading
• Fully Synchronous Operation for Counting
• Synchronously Programmable
• Flow-Through Architecture Optimizes PCB
Layout
• Center-Pin V_CC and GND Configurations
Minimize High-Speed Switching Noise
• EPIC  (Enhanced-Performance Implanted
CMOS) 1-µm Process
• 500-mA Typical Latch-Up Immunity
at 125°C
• Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
74ACT11160
SYNCHRONOUS 4ĆBIT DECADE COUNTER
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SCAS170 − D3624, AUGUST 1990 − REVISED APRIL 1993
DW OR N PACKAGE
(TOP VIEW)
RCO ₁
Q_{A 2}
Q_{B 3}
GND ₄
GND ₅
GND ₆
GND 7
Q_C 8
Q_D 9
LOAD 10
20 ^CLR
19 ^CLK
18 ^A
17 ^B
16 ^V_CC
15 ^V_CC
14 C
13 D
12 ENP
11 ENT
description
This synchronous, presettable 4-bit decade counter features an internal carry look-ahead circuitry for
application in high-speed counting designs. Synchronous operation is provided by having all flip-flops clocked
simultaneously so that the outputs change coincident with each other when so instructed by the count-enable
inputs and internal gating. This mode of operation eliminates the output counting spikes that are normally
associated with asynchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the four flip-flops
on the rising (positive-going) edge of the clock-input waveform.
This counter is fully programmable; that is, it may be preset to any number between 0 and 9. As presetting is
synchronous, setting up a low level at the load (LOAD) input disables the counter and causes the outputs to
agree with the setup data after the next clock rising edge regardless of the levels of the enable inputs. The clear
function for the 74ACT11160 is asynchronous, and a low level at the clear (CLR) input sets all four of the flip-flop
outputs low regardless of the levels of the clock, load, or enable inputs.
The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without
additional gating. Instrumental in accomplishing this function are two count-enable (ENP and ENT) inputs and
a ripple-carry (RCO) output. Both count-enable inputs must be held high to count, and ENT is fed forward to
enable RCO. RCO thus enabled will produce a high-level pulse while the count is 9 (HLLH). This high-level
overflow ripple-carry pulse can be used to enable successive cascaded stages. Transitions at ENP or ENT are
allowed regardless of the level of the clock input.
This counter features a fully independent clock circuit. Changes at control inputs (ENP, ENT, or LOAD) that will
modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of
the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the
setup and hold times.
The 74ACT11160 is characterized for operation from − 40°C to 85°C.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright  1993, Texas Instruments Incorporated
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