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74AC11873 Datasheet, PDF (1/8 Pages) Texas Instruments – DUAL 4-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS
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74AC11873
DUAL 4ĆBIT DĆTYPE LATCH
WITH 3ĆSTATE OUTPUTS
SCAS095 − JANUARY 1990 − REVISED APRIL 1993
• 3-State Buffer-Type Outputs Drive Bus
Lines Directly
• Bus-Structured Pinout
• Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
• EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
• 500-mA Typical Latch-Up Immunity
at 125°C
description
This dual 4-bit transparent D-type latch features
3-state outputs designed specifically for bus
driving. This makes these devices particularly
suitable for implementing buffer registers, I/O
ports, bidirectional bus drivers, and working
registers.
DW PACKAGE
(TOP VIEW)
1LE 1
1Q1 2
1Q2 3
1Q3 4
1Q4 5
GND 6
GND 7
GND 8
GND 9
2Q1 10
2Q2 11
2Q3 12
2Q4 13
2LE 14
28 1OC
27 1CLR
26 1D1
25 1D2
24 1D3
23 1D4
22 VCC
21 VCC
20 2D1
19 2D2
18 2D3
17 2D4
16 2CLR
15 2OC
When the latch-enable (1LE or 2LE) input is high, the Q outputs will follow the data (D) inputs in true form,
according to the function table. When LE is taken low, the outputs will be latched. When the clear (1CLR or
2CLR) input goes low, the Q outputs go low independently of LE. The outputs are in a high-impedance state
when the output-control (1OC or 2OC) input is at a high logic level.
The 74AC11873 is characterized for operation from − 40°C to 85°C.
FUNCTION TABLE
(each 4-bit latch)
INPUTS
OC CLR LE
OUTPUT
D
Q
L
L
X
X
L
L
H
H
H
H
L
H
H
L
L
L
H
L
X
Q0
H
X
X
X
Z
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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• POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
Copyright  1993, Texas Instruments Incorporated
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