74AC11478 Datasheet, PDF (1/7 Pages) Texas Instruments – OCTAL DUAL-RANK D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

• Specifically Designed for Data
Synchronization Applications
• 3-State Outputs Drive Bus Lines Directly
• Flow-Through Architecture Optimizes PCB
Layout
• Center-Pin V_CC and GND Pin
Configurations Minimize High-Speed
Switching Noise
• EPIC  (Enhanced-Performance Implanted
CMOS ) 1-µm Process
• Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
description
74AC11478
OCTAL DUALĆRANK DĆTYPE FLIPĆFLOP
WITH 3ĆSTATE OUTPUTS
SCAS182 − APRIL 1989 − REVISED APRIL 1993
DW OR NT PACKAGE
(TOP VIEW)
1Q 1
2Q 2
3Q 3
4Q 4
GND 5
GND 6
GND 7
GND 8
5Q ⁹
6Q ¹⁰
7Q ¹¹
8Q ¹²
24 OE
23 1D
22 2D
21 3D
20 4D
19 V_CC
18 V_CC
17 5D
16 _6D
15 _7D
14 _8D
13 _CLK
The 74AC11478 is an 8-bit dual-rank synchronizer circuit designed specifically for data synchronization
applications in which the normal setup and hold time specifications are frequently violated.
Synchronization of two digital signals operating at different frequencies is a common system problem. This
problem is typically solved by synchronizing one of the signals to the local clock through a flip-flop. This solution,
however, causes the setup and hold time specifications associated with the flip-flop to be violated. When the
setup or hold time of a flip-flop is violated, the output response is uncertain. A flip-flop is metastable if its output
hangs up in the region between V_IL and V_IH. The metastable condition lasts until the flip-flop recovers into one
of its two stable states. With conventional flip-flops, this recovery time can be longer than the specified maximum
propagation delay.
The problem of metastability is typically solved by adding an additional layer of synchronization. This dual-rank
approach is employed in the 74AC11478. The probability of the second stage entering the metastable state is
exponentially reduced by this dual-rank architecture. The 74AC11478 provides a one-chip solution for system
designers in asynchronous applications.
The 74AC11478 is characterized for operation from − 40°C to 85°C.
FUNCTION TABLE
INPUTS
OUTPUT
OE CLK† D
Q
H
X
X
Z
L
↑
L
L
L
↑
H
H
L
L
X
Q0
† _{Data presented at the D inputs}
requires two clock cycles to appear at
the Q outputs.
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PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  1993, Texas Instruments Incorporated
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