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74AC11086_15 Datasheet, PDF (1/10 Pages) Texas Instruments – QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
74AC11086
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
D Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
D EPIC™ (Enhanced-Performance Implanted
CMOS) 1-µm Process
D 500-mA Typical Latch-Up Immunity at
125°C
D Package Options Include Plastic
Small-Outline (D) Packages and Standard
Plastic 300-mil DIPs (N)
description
SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996
D OR N PACKAGE
(TOP VIEW)
1A 1
1Y 2
2Y 3
GND 4
GND 5
3Y 6
4Y 7
4B 8
16 1B
15 2A
14 2B
13 VCC
12 VCC
11 3A
10 3B
9 4A
This device contains four independent 2-input exclusive-OR gates. It performs the Boolean function
Y = A ⊕ B = AB + AB in positive logic.
A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced
in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the
output.
The 74AC11086 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each gate)
INPUTS
A
B
OUTPUT
Y
L
L
L
L
H
H
H
L
H
H
H
L
logic symbol†
1
1A
=1
16
1B
15
2A
14
2B
11
3A
10
3B
9
4A
8
4B
2
1Y
3
2Y
6
3Y
7
4Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1996, Texas Instruments Incorporated
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