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100324 Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – Low Power Hex TTL-to-ECL Translator
OBSOLETE
100324
www.ti.com
SNOS128B – AUGUST 1998 – REVISED APRIL 2013
100324 Low Power Hex TTL-to-ECL Translator
Check for Samples: 100324
FEATURES
1
•2 Pin/Function Compatible with 100124
• Meets 100124 AC Specifications
• 50% Power Reduction of the 100124
• Differential Outputs
• 2000V ESD Protection
• −4.2V to −5.7V Operating Range
• Standard Microcircuit Drawing
– (SMD) 5962-9153001
DESCRIPTION
The 100324 is a hex translator, designed to convert
TTL logic levels to 100K ECL logic levels. The inputs
are compatible with standard or Schottky TTL. A
common Enable (E), when LOW, holds all inverting
outputs HIGH and holds all true outputs LOW. The
differential outputs allow each circuit to be used as an
inverting/non-inverting translator, or as a differential
line driver. The output levels are voltage
compensated over the full −4.2V to −5.7V range.
When the circuit is used in the differential mode, the
100324, due to its high common mode rejection,
overcomes voltage gradients between the TTL and
ECL ground systems. The VEE and VTTL power may
be applied in either order.
The 100324 is pin and function compatible with the
100124 with similar AC performance, but features
power dissipation roughly half of the 100124 to ease
system cooling requirements.
Logic Diagram
Table 1. Pin Descriptions
Pin Names
D0–D5
E
Q0–Q5
Q0–Q5
Description
Data Inputs
Enable Input
Data Outputs
Complementary
Data Outputs
1
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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