100315 Datasheet, PDF (1/7 Pages) National Semiconductor (TI) – Low-Skew Quad Clock Driver

OBSOLETE
100315
www.ti.com
SNOS133B – AUGUST 1998 – REVISED APRIL 2013
100315 Low-Skew Quad Clock Driver
Check for Samples: 100315
FEATURES
1
•2 Low Output to Output Skew (≤50 ps)
• Differential Inputs and Outputs
• Secondary Clock Available for System Level
Testing
• 2000V ESD Protection
• Voltage Compensated Operating Range: −4.2V
to −5.7V
• Standard Microcircuit Drawing (SMD)
5962-9469601
DESCRIPTION
The 100315 contains four low skew differential
drivers, designed for generation of multiple, minimum
skew differential clocks from a single differential input.
This device also has the capability to select a
secondary single-ended clock source for use in lower
frequency system level testing. The 100315 is a 300
Series redesign of the 100115 clock driver.
Logic Diagram
Connection Diagram
Figure 1. Flatpak
CLKIN, CLKIN
CLK_1–4, CLK_1–4
TCLK
CLKSEL
Pin Names
Differential Clock Inputs
Differential Clock Outputs
Test Clock Input ⁽¹⁾
Clock Input Select ⁽¹⁾
(1) TCLK and CLKSEL are single-ended inputs, with internal 50 kΩ pulldown resistors.
CLKSEL
L
L
H
H
CLKIN
L
H
X
X
TRUTH TABLE⁽¹⁾
CLKIN
TCLK
H
X
L
X
X
L
X
H
(1) L = Low Voltage Level
H = High Voltage Level
X = Don't Care
Description
CLK_N
L
H
L
H
CLK_N
H
L
H
L
1
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2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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