100301 Datasheet, PDF (1/6 Pages) National Semiconductor (TI) – Low Power Triple 5-Input OR/NOR Gate

OBSOLETE
100301
www.ti.com
SNOS118B – AUGUST 1998 – REVISED APRIL 2013
100301 Low Power Triple 5-Input OR/NOR Gate
Check for Samples: 100301
FEATURES
1
•2 23% Power Reduction of the 100101
• 2000V ESD Protection
• Pin/Function Compatible with 100101
• Voltage Compensated Operating Range =
−4.2V to −5.7V
• Standard Microcircuit Drawing
– (SMD) 5962-9152801
DESCRIPTION
The 100301 is a monolithic triple 5-input OR/NOR
gate. All inputs have 50 kΩ pull-down resistors and all
outputs are buffered.
Logic Symbol
Table 1. PIN DESCRIPTIONS
Pin Names
D_na, D_nb, D_nc
O_a, O_b, O_c
O_a, O_b, O_c
Description
Data Inputs
Data Outputs
Complementary Data Outputs
Connection Diagrams
Figure 1. 24-Pin CERDIP
Figure 2. 24-Pin CPGA
See NAQ0024C Package
1
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2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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