PCM1861_15 Datasheet, PDF (96/115 Pages) Texas Instruments – PCM186x 110dB 2ch and 4ch Audio ADCs with Universal Front End

PCM1861, PCM1863, PCM1865
SLAS831C – MARCH 2014 – REVISED AUGUST 2014
Dec
Hex
86
0x56
Reset Value
b7
DIFF7
0
b6
DIFF6
1
Page 0 / Register 86 (Hex 0x56)
b5
b4
b3
DIFF5
DIFF4
DIFF3
1
1
1
DIFF[7:0]
SIGDET_DC_DIFF_CH4_R
Difference level of Controlsense detection
Default value: 01111111
0x7F: Default
Dec
Hex
87
0x57
Reset Value
b7
LEVEL7
0
b6
LEVEL6
0
Page 0 / Register 87 (Hex 0x57)
b5
b4
b3
LEVEL5
LEVEL4
LEVEL3
0
0
0
LEVEL[7:0]
10.7.3 SIGDET_DC_LEVEL_CH4_R
Current DC level
Default value: 00000000
b2
DIFF2
1
b2
LEVEL2
0
b1
DIFF1
1
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b0
DIFF0
1
b1
LEVEL1
0
b0
LEVEL0
0
Dec
Hex
88
0x58
Reset Value
b7
DC_NOLATCH
0
b6
AUXADC_RDY
0
Page 0 / Register 88 (Hex 0x58)
b5
b4
b3
DC_RDY
AUXADC_LATCH AUXADC_DATA_
TYPE
0
0
0
b2
DC_CH2
0
b1
DC_CH1
0
b0
DC_CH0
0
DC_NOLATCH
AUXADC_RDY
DC_RDY
AUXADC_LATCH
AUXADC_DATA_TYPE
DC_CH[2:0]
AUXADC_DATA_CTRL
Read Directly without latch operation (from secondary ADC)
Default value: 0
0: With latch operation
1: Without latch operation when read DC value
Indicate the latch operation is finished and AUXADC value is ready for read operation
Default value: 0
0: Latch operation is running
1: AUXADC value is ready for read operation
Indicate the latch operation is finished and DC value is ready
Default value: 0
0: Latch operation is running
1: DC value is ready for read operation
Trigger to latch 16-bit AUXADC value for read operation: Rising edge is the trigger signal
Default value: 0
0: Idle
1: Latch the value for read operation
Data to be read from Control Interface
Default value: 0
0: read LPF data
1: read HPF data
Select DC-value channel to be latched for control-interface read operation
Default value: 000
000: CH1_L
96
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