TVP3026M Datasheet, PDF (9/95 Pages) Texas Instruments – Video Interface Palette

1.2 Functional Block Diagram
REF
FS ADJUST
P63 – P0
LCLK
1:1
64
Pixel
Bus
Latch
2:1
64 ^Pipe 32
MUX
True-
Color
32 _MUX
24
24
Unpack ²⁴
32 ^Logic
24
VGA7 – VGA0
VGA
8 Latch
8
Pseudo-
8
32 Color
MUX ⁸
Read
Page
Mask 8 Reg 8
8
8
Vref
1.235 V
Direct-Color
24
Pipeline ₂₄
Delay
8 ^{Color Key}
Switch
24
3 × 256 × 8
8
Color
Output
8
Palette
RAM
MUX
24
8
1 × 24
Overscan
Color
24
8 ^DAC
DAC
8
D7 – D0
8
MPU
RS3 – RS0
Registers
5
and
RD
Control
Logic
WR
DOT
Clock
Divider
Loop
Clock
PLL
Clock Select
Pixel
Clock
PLL
Memory
Clock
PLL
3 × 24
Cursor
Colors
24
2
64 × 64 × 2
Cursor RAM
and Control ²
2
DAC
8
Test Function
and
Sense Comparator
Video-Signal
Control
COMP2
COMP1
IOR
IOG
IOB
SENSE
HSYNCOUT
VSYNCOUT
5
Figure 1–1. Functional Block Diagram
1–3