TPS62290_15 Datasheet, PDF (9/27 Pages) Texas Instruments – TPS6229x 1-A Step Down Converter in 2 x 2 DRV Package

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TPS62290, TPS62291, TPS62293
SLVS764E – JUNE 2007 – REVISED OCTOBER 2015
7.4 Device Functional Modes
7.4.1 Soft-Start
The TPS6229x has an internal soft start circuit that controls the ramp up of the output voltage. The output
voltage ramps up from 5% to 95% of its nominal value within typical 250 μs. This limits the inrush current in the
converter during ramp up and prevents possible input voltage drops when a battery or high impedance power
source is used. The soft start circuit is enabled within the start up time t_{Start Up}.
7.4.2 Power Save Mode
The power save mode is enabled with MODE pin set to low level. If the load current decreases, the converter will
enter power save mode operation automatically. During power save mode the converter skips switching and
operates with reduced frequency in PFM mode with a minimum quiescent current to maintain high efficiency. The
converter will position the output voltage typically +1% above the nominal output voltage. This voltage positioning
feature minimizes voltage drops caused by a sudden load step.
The transition from PWM mode to PFM mode occurs once the inductor current in the low side MOSFET switch
becomes zero, which indicates discontinuous conduction mode.
During the power save mode the output voltage is monitored with a PFM comparator. As the output voltage falls
below the PFM comparator threshold of V_OUT nominal +1%, the device starts a PFM current pulse. The high side
MOSFET switch will turn on and the inductor current ramps up. After the on-time expires, the switch is turned off
and the low side MOSFET switch is turned on until the inductor current becomes zero.
The converter effectively delivers a current to the output capacitor and the load. If the load is below the delivered
current, the output voltage will rise. If the output voltage is equal or higher than the PFM comparator threshold,
the device stops switching and enters a sleep mode with typical 15 μA current consumption.
If the output voltage is still below the PFM comparator threshold, a sequence of further PFM current pulses are
generated until the PFM comparator threshold is reached. The converter starts switching again once the output
voltage drops below the PFM comparator threshold.
With a fast single threshold comparator, the output voltage ripple during PFM mode operation can be kept small.
The PFM pulse is time controlled, which allows to modify the charge transferred to the output capacitor by the
value of the inductor. The resulting PFM output voltage ripple and PFM frequency depend in first order on the
size of the output capacitor and the inductor value. Increasing output capacitor values and inductor values will
minimize the output ripple. The PFM frequency decreases with smaller inductor values and increases with larger
values.
The PFM mode is left and PWM mode entered in case the output current can not longer be supported in PFM
mode. The power save mode can be disabled through the MODE pin set to high. The converter will then operate
in fixed frequency PWM mode.
7.4.3 100% Duty Cycle Low Dropout Operation
The device starts to enter 100% duty cycle mode once the input voltage comes close to the nominal output
voltage. In order to maintain the output voltage, the high side MOSFET switch is turned on 100% for one or more
cycles.
With further decreasing V_IN the high side MOSFET switch is turned on completely. In this case, the converter
offers a low input-to-output voltage difference. This is particularly useful in battery-powered applications to
achieve longest operation time by taking full advantage of the whole battery voltage range.
The minimum input voltage to maintain regulation depends on the load current and output voltage, and can be
calculated as:
V_INmin = V_OUTmax + (I_OUTmax × (R_DS(on)max + R_L))
where
• I_OUTmax = Maximum output current plus inductor ripple current
• R_DS(on)max = Maximum P-channel switch R_DS(on)
• R_L = DC resistance of the inductor
• V_OUTmax = Nominal output voltage plus maximum output voltage tolerance
(1)
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