TPS3808G125 Datasheet, PDF (9/15 Pages) Texas Instruments – Low Quiescent Current, Programmable-Delay Supervisory Circuit

TPS3808
www.ti.com
1.2V
3.3V
SENSE V_DD
TPS3808G12
RESET
C_{T GND}
SENSE V_DD
TPS3808G33
MR
RESET
C_{T GND}
V_I/O V_CORE
DSP
GPIO
GND
Figure 12. Using MR to Monitor Multiple System
Voltages
3.3V
V _DD SENSE
90kΩ
C_T
TP S 38 08xx x
SBVS050F – MAY 2004 – REVISED OCTOBER 2006
affected by the choice of resistor. Figure 14b shows
a fixed 20ms delay time by leaving the C_T pin open.
Figure 14c shows a ground referenced capacitor
connected to C_T for a user-defined program time
between 1.25ms and 10s.
The capacitor C_T should be ≥ 100pF nominal value
in order for the TPS3808xxx to recognize that the
capacitor is present. The capacitor value for a given
delay time can be calculated using the following
equation:
C_T (nF) + ^ƪt_D (s)*0.5 10^*3 (s)^ƫ 175
(1)
The reset delay time is determined by the time it
takes an on-chip precision 220nA current source to
charge the external capacitor to 1.23V. When a
RESET is asserted the capacitor is discharged.
When the RESET conditions are cleared, the internal
current source is enabled and begins to charge the
external capacitor. When the voltage on this
capacitor reaches 1.23V, RESET is de-asserted.
Note that a low leakage type capacitor such as a
ceramic should be used, and that stray capacitance
around this pin may cause errors in the reset delay
time.
GND
Figure 13. Using an External MOSFET to
Minimize I_DD When MR Signal Does Not Go to V_DD
SELECTING THE RESET DELAY TIME
The TPS3808 has three options for setting the
RESET delay time as shown in Figure 14.
Figure 14a shows the configuration for a fixed 300ms
typical delay time by tying C_T to V_DD; a resistor from
40kΩ to 200kΩ must be used. Supply current is not
IMMUNITY TO SENSE PIN VOLTAGE
TRANSIENTS
The TPS3808 is relatively immune to short negative
transients on the SENSE pin. Sensitivity to transients
is dependent on threshold overdrive, as shown in the
Maximum Transient Duration at Sense vs Sense
Threshold Overdrive Voltage graph (Figure 6) in the
Typical Characteristics section.
3.3V
3.3V
3.3V
SENSE V_DD
50kΩ _TPS3808G33
SENSE V_DD
TPS3808G33
SENSE V_DD
TPS3808G33
C_T RESET
C_T RESET
C_T RESET
C_T
300ms Delay
(a)
20ms Delay
(b)
Delay (s) = C_T (nF) + 0.5 x 10^−3 (s)
175
(c)
Figure 14. Configuration Used to Set the RESET Delay Time
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