TLK1101E_10 Datasheet, PDF (9/28 Pages) Texas Instruments – 11.3-Gbps Cable and PC Board Equalizer

TLK1101E
www.ti.com
SLLS845A – AUGUST 2007 – REVISED OCTOBER 2007
REGISTER MAPPING
The register mapping for read/write register addresses 0 (0x00) through 13 (0x0D) are shown in Table 4 through
Table 17. The register mapping for the read only register addresses 14 (0x0E) and 15 (0x0F) are shown in
Table 18 and Table 19. Table 20 describes the circuit functionality based on the register settings.
bit 7
REG11OFF
bit 6
REG3OFF
Table 4. Register 0 (0x00) Mapping – Control Settings
bit 5
REG2OFF
register address 0 (0x00)
bit 4
bit 3
REG1OFF
DISABLE
bit 2
LOS_RNG
bit 1
OCOFF
bit 0
I2CMODE
bit 7
THRESH7
Table 5. Register 1 (0x01) Mapping – Input Threshold Adjust
bit 6
THRESH6
bit 5
THRESH5
register address 1 (0x01)
bit 4
bit 3
THRESH4
THRESH3
bit 2
THRESH2
bit 1
THRESH1
bit 0
THRESH0
Table 6. Register 2 (0x02) Mapping – De-emphasis Setting
bit 7
–
bit 6
–
bit 5
–
register address 2 (0x02)
bit 4
bit 3
–
DEEM3
bit 2
DEEM2
bit 1
DEEM1
bit 0
DEEM0
Table 7. Register 3 (0x03) Mapping – Output Swing Control
bit 7
–
bit 6
–
bit 5
–
register address3 (0x03)
bit 4
bit 3
–
–
bit 2
–
bit 1
AMP1
bit 0
AMP0
Table 8. Register 4 (0x04) Mapping
bit 7
–
bit 6
–
bit 5
–
register address 4 (0x04)
bit 4
bit 3
–
–
bit 2
–
bit 1
–
bit 0
–
Table 9. Register 5 (0x05) Mapping
bit 7
–
bit 6
–
bit 5
–
register address 5 (0x05)
bit 4
bit 3
–
–
bit 2
–
bit 1
–
bit 0
–
Table 10. Register 6 (0x06) Mapping
bit 7
–
bit 6
–
bit 5
–
register address 6 (0x06)
bit 4
bit 3
–
–
bit 2
–
bit 1
–
bit 0
–
bit 7
RATE_7
Table 11. Register 7 (0x07) Mapping – Maximum Data Rate Setting
bit 6
–
bit 5
–
register address 7 (0x07)
bit 4
bit 3
–
RATE_3
bit 2
RATE_2
bit 1
RATE_1
bit 0
RATE_0
Copyright © 2007, Texas Instruments Incorporated
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