TFP513 Datasheet, PDF (9/29 Pages) Texas Instruments – TI PANELBUS DIGITAL TRANSMITTER

timing diagrams
TFP513
TI PanelBusā DIGITAL TRANSMITTER
SLLS611 − AUGUST 2004
tr
DVI
Outputs
tf
80% VOD
20% VOD
Figure 1. Rise and Fall Time for DVI Outputs
IDCK−
th(IDF)
IDCK+
tsu(IDF)
tsu(IDR)
th(IDR)
DATA[23:0], DE,
VIH
HSYNC, VSYNC
VIL
Figure 2. Control and Single-Edge-Data Setup/Hold Time to IDCK±
IDCK+
tsu(ID)
th(ID)
th(ID)
tsu(ID)
DATA[23:0], DE,
VIH
HSYNC, VSYNC
VIL
Figure 3. Dual-Edge Data Setup/Hold Times to IDCK+
TX+
50%
TX−
tsk(D)
Figure 4. Analog Output Intra-Pair ± Differential Skew
TXN 50%
tsk(CC)
TXM 50%
Figure 5. Analog Output Channel-to-Channel Skew
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