SN65LVDM1676_08 Datasheet, PDF (9/21 Pages) Texas Instruments – HIGH-SPEED DIFFERENTIAL LINE TRANSCEIVERS

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SN65LVDM1676
SN65LVDM1677
SLLS430D – NOVEMBER 2000 – REVISED JUNE 2007
PARAMETER MEASUREMENT INFORMATION (continued)
Input
3V
V_CC/2
0V
Y
t_pLH
t_pHL
Input
Z
V_OD
R_L
C_L = 10 pF
(2 Places)
Output
0V
V_OD(H)
t_f
V_OD(L)
100%
80%
20%
0%
t_r
NOTE: All input pulses are supplied by a generator having the following characteristics: t_r or t_f ≤ 1 ns, pulse repetition rate
(PRR) = 0.5 Mpps, pulse width = 10 ± 0.2 ns. C_L includes instrumentation and fixture capacitance within 0,06 m of
the D.U.T.
Figure 4. Test Circuit, Timing, and Voltage Definitions for the Differential Output Signal
0.8 V or 2 V
TX/RX
Y
R_L/2 (2 Places)
Z
C_L = 10 pF
(2 Places)
V_OY V_OZ
+ _{1.2 V}
–
TX/RX
3V
V_CC/2
0V
t_pZH
V_OY or V_OZ
t_pHZ
@ 1.4 V
1.25 V
1.2 V
t_pZL
V_OZ or V_OY
t_pHZ
1.2 V
1.15 V
@1V
NOTE: All input pulses are supplied by a generator having the following characteristics: t_r or t_f ≤ 1 ns, pulse repetition rate
(PRR) = 0.5 Mpps, pulse width = 500 ± 10 ns. C_L includes instrumentation and fixture capacitance within 0,06 m of
the D.U.T.
Figure 5. Enable and Disable Time Circuit and Definitions
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