PCA9547 Datasheet, PDF (9/26 Pages) Texas Instruments – 8-channel I2C-bus multiplexer with reset

Philips Semiconductors
PCA9547
8-channel I²C-bus multiplexer with reset
7. Characteristics of the I²C-bus
The I²C-bus is for 2-way, 2-line communication between different ICs or modules. The two
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
7.1 Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see Figure 8).
SDA
SCL
Fig 8. Bit transfer
data line
stable;
data valid
change
of data
allowed
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7.1.1 START and STOP conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (seeFigure 9.)
SDA
SCL
S
START condition
Fig 9. Definition of START and STOP conditions
SDA
P
STOP condition
SCL
mba608
PCA9547_2
Product data sheet
Rev. 02 — 12 September 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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