CDCLVP1204RGTT Datasheet, PDF (9/22 Pages) Texas Instruments – Four LVPECL Output, High-Performance Clock Buffer

CDCLVP1204
www.ti.com
SCAS880C – AUGUST 2009 – REVISED AUGUST 2011
Figure 10 shows the output voltage and rise/fall time. Output and part-to-part skew are shown in Figure 11.
OUTNx
OUTPx
VOD
V_OH
V_OL
80%
20%
0V
t_R
t_F
Figure 10. Output Voltage and Rise/Fall Time
V_OUT,DIFF,PP (= 2 ´ VOD)
INNx
INPx
OUTN0
OUTP0
OUTN1
OUTP1
OUTN2
OUTP2
OUTN3
OUTP3
t_PLH0
t_PLH1
t_PLH2
t_PLH3
t_PLH0
t_PLH1
t_PLH2
t_PLH3
(1) Output skew is calculated as the greater of the following: As the difference between the fastest and the slowest t_PLHn
(n = 0, 1, 2, 3), or as the difference between the fastest and the slowest t_PHLn (n = 0, 1, 2, 3).
(2) Part-to-part skew is calculated as the greater of the following: As the difference between the fastest and the slowest
t_PLHn (n = 0, 1, 2, 3) across multiple devices, or the difference between the fastest and the slowest t_PHLn (n = 0, 1, 2,
3) across multiple devices.
Figure 11. Output and Part-to-Part Skew
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