ADS5547_07 Datasheet, PDF (9/57 Pages) Texas Instruments – 14-BIT, 210 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

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Input
Signal
Input
Clock
CLKP
CLKM
N+3
N+4
N+2
Sample
N+1
N
t_a
ADS5547
SLWS192A – NOVEMBER 2006 – REVISED MAY 2007
N+14
N+15
N+16
N+17
CLKOUTM
CLKOUTP
DDR
LVDS
Output Data
DXP, DXM
14 Clock Cycles
EOEOEOEOEOE
t_su
t_h
t_PDI
OEOEOEOEO
E – Even Bits D0,D2,D4,D6,D8,D10,D12
O – Odd Bits D1,D3,D5,D7,D9,D11,D13
N–14
N–13
N–12
N–11
N–10
CLKOUT
Parallel
CMOS
Output Data
D0–D13
N–14
N–13
14 Clock Cycles
N–12
N–11
N–10
N–1
N
N+1
N+2
t_PDI
t_su
t_h
N–1
N
N+1
N+2
Figure 1. Latency
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