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| ADS5242 Datasheet, PDF (9/29 Pages) Texas Instruments – 4-Channel, 12-Bit, 65MSPS Analog-to-Digital Converter with Serial LVDS Interface | |||
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www.ti.com
ADS5242
SBAS330C â OCTOBER 2004 â REVISED OCTOBER 2005
POWER-DOWN TIMING
1µs
500µs
PD
Device Fully
Powers Down
Device Fully
Powers Up
NOTE: The shown powerâup time is based on 1µF bypass capacitors on the reference pins.
See the Theory of Operation section for details.
SERIAL INTERFACE TIMING
ADCLK
Outputs change on
next rising clock edge
after CS goes high.
CS
SCLK
Start Sequence
t6
t1
t2
t3
Data latched on
t7
each rising edge of SCLK.
SDATA
D7
(MSB)
t4
t5
PARAMETER
t1
t2
t3
t4
t5
t6
t7
D6
D5
D4
D3
NOTE: Data is shifted in MSB first.
DESCRIPTION
MIN
Serial CLK Period
50
Serial CLK High Time
20
Serial CLK Low Time
20
Minimum Data Setup Time
5
Minimum Data Hold Time
5
CS Fall to SCLK Rise
8
SCLK Rise to CS Rise
8
D2
D1
D0
TYP
MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
9
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