74AC11191 Datasheet, PDF (9/10 Pages) Texas Instruments – SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTER

74AC11191
SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTER
SCAS105A – FEBRUARY 1990 – REVISED APRIL 1993
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
500 Ω
LOAD CIRCUIT
Timing Input
(see Note B)
50%
tsu
Data
Input
50%
th
50%
SETUP AND HOLD TIMES
VCC
0V
VCC
0V
High-Level
Input
Low-Level
Input
50%
tw
50%
50%
VCC
0V
50%
VCC
0V
Input
(see Note B)
tPLH
In-Phase
Output
tPHL
Out-of-Phase
Output
50%
50%
50% VCC
VCC
0V
tPHL
VOH
50% VCC
VOL
tPLH
50% VCC
VOH
50% VCC
VOL
PULSE DURATION
PROPAGATION DELAY TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
9