 English |
|
|
|
|
|
|
|
| TMS570LS20216 Datasheet, PDF (89/101 Pages) Texas Instruments – 16/32-BIT RISC Flash Microcontroller | |||
| |||
| ◁ |
www.ti.com
7.14.3 RTPENABLE Timing
tt((RRTTPP)d)idsiasbaleble
TMS570LS20216, TMS570LS20206, TMS570LS10216
TMS570LS10206, TMS570LS10116, TMS570LS10106
SPNS141 â MARCH 2010
t(Rt(TRPTP)e)ennaabblele
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
HCLK
RTPCLK
RTPENA
RTPSYNC
RRTTPPDATA
d1 d2 d3
d4
d5 d6 d7 d8
Divide by 1
Figure 7-23. RTPENABLE Timing
Parameter
t(RTP)disable
t(RTP)enable
Table 7-22. RTPENABLE Timing
Minimum
3tc(HCLK) + tr(RTPSYNC) + 12ns
Maximum
4tc(HCLK) + tr(RTPSYNC)
5tc(HCLK) + tr(RTPSYNC) + 12ns
Description
time RTPENA must go high
before what would be the next
RTPSYNC, to guarantee
delaying the next packet
time after RTPENA goes low
before a packet that has been
halted, resumes
Copyright © 2010, Texas Instruments Incorporated
Peripheral and Electrical Specifications
89
Submit Documentation Feedback
Product Folder Link(s): TMS570LS20216 TMS570LS20206 TMS570LS10216 TMS570LS10206 TMS570LS10116
TMS570LS10106
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese