TMS320F240PQG4 Datasheet, PDF (87/105 Pages) Texas Instruments – DSP CONTROLLER

TMS320F240
DSP CONTROLLER
SPRS042E – OCTOBER 1996 – REVISED NOVEMBER 2002
PARAMETER MEASUREMENT INFORMATION
tc(SPC)M
SPICLK
(clock polarity = 0)
tw(SPCH)M
tw(SPCL)M
SPICLK
(clock polarity = 1)
SPISIMO
SPISOMI
tw(SPCL)M
tw(SPCH)M
tsu(SIMO-SPCH)M
tsu(SIMO-SPCL)M
tv(SPCH-SIMO)M
tv(SPCL-SIMO)M
Master Out Data Is Valid
tsu(SOMI-SPCH)M
tsu(SOMI-SPCL)M
Master In Data
Must Be Valid
tv(SPCH-SOMI)M
tv(SPCL-SOMI)M
Data Valid
SPISTE^†
† _{The SPISTE signal must be active before the SPI communication stream starts; the SPISTE signal must remain active until}
the SPI communication stream is complete.
Figure 45. SPI Master Mode External Timings (Clock Phase = 1)
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