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SMOMAPL138B Datasheet, PDF (81/281 Pages) Texas Instruments – SMOMAPL138B Low-Power Applications Processor
SMOMAPL138B-HiRel
www.ti.com
SLVSAQ9 – JANUARY 2011
4.4 Electrical Characteristics Over Recommended Ranges of Supply Voltage and
Operating Junction Temperature (Unless Otherwise Noted)
PARAMETER
High-level output voltage
(dual-voltage LVCMOS IOs at 3.3V)(1)
VOH
High-level output voltage
(dual-voltage LVCMOS IOs at 1.8V)(1)
Low-level output voltage
(dual-voltage LVCMOS I/Os at 3.3V)
VOL
Low-level output voltage
(dual-voltage LVCMOS I/Os at 1.8V)
Input current(1)
(dual-voltage LVCMOS I/Os)
II (2)
Input current (DDR2/mDDR I/Os)
IOH
IOL
Capacitance
High-level output current(1)
(dual-voltage LVCMOS I/Os)
Low-level output current(1)
(dual-voltage LVCMOS I/Os)
Input capacitance (dual-voltage LVCMOS)
Output capacitance (dual-voltage LVCMOS)
TEST
CONDITIONS
MIN
TYP
DVDD= 3.15V,
IOH = -4 mA
DVDD= 3.15V,
IOH = -100 μA
DVDD= 1.65V,
IOH = -2 mA
DVDD= 3.15V,
IOL = 4mA
DVDD= 3.15V,
IOL = 100 μA
DVDD= 1.65V,
IOL = 2mA
VI = VSS to
DVDD without
opposing
internal resistor
2.4
2.95
DVDD-0.45
VI = VSS to
DVDD with
opposing
70
internal pullup
resistor (3)
VI = VSS to
DVDD with
opposing
internal
-75
pulldown
resistor (3)
VI = VSS to
DVDD with
opposing
internal
-77
pulldown
resistor (3)
3
3
MAX
0.4
0.2
0.45
UNIT
V
V
V
V
V
V
±9
μA
310
μA
-270
μA
-286
μA
-6
mA
6
mA
pF
pF
(1) These IO specifications apply to the dual-voltage IOs only and do not apply to DDR2/mDDR or SATA interfaces. DDR2/mDDR IOs are
1.8V IOs and adhere to the JESD79-2A standard. USB0 I/Os adhere to the USB2.0 standard. USB1 I/Os adhere to the USB1.1
standard. SATA I/Os adhere to the SATA-I and SATA-II standards.
(2) II applies to input-only pins and bi-directional pins. For input-only pins, II indicates the input leakage current. For bi-directional pins, II
indicates the input leakage current and off-state (Hi-Z) output leakage current.
(3) Applies only to pins with an internal pullup (IPU) or pulldown (IPD) resistor. The pull-up and pull-down strengths shown represent the
minimum and maximum strength across process variation.
Copyright © 2011, Texas Instruments Incorporated
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Device Operating Conditions
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